Mesa (7.10): i965: Refactor Sandybridge implied move handling.
Ian Romanick
idr at kemper.freedesktop.org
Thu Apr 21 17:38:25 UTC 2011
Module: Mesa
Branch: 7.10
Commit: 773ea1a2345b5d5f8291339a02d7cacb5ea7302e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=773ea1a2345b5d5f8291339a02d7cacb5ea7302e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Mar 16 14:09:17 2011 -0700
i965: Refactor Sandybridge implied move handling.
This is actually a squash of the following two commits. The first
caused a regression, and the second fixes it. The refactor of the
first is needed for another patch that fixes an SNB bug.
i965: Refactor Sandybridge implied move handling.
This was open-coded in three different places, and more are necessary.
Extract this into a function so it can be reused.
Unfortunately, not all variations were the same: in particular, one set
compression control and checked that the source register was not
ARF_NULL. This seemed like a good idea, so all cases now do so.
(cherry picked from commit 9a21bc640188e4078075b9f8e6701853a4f0bbe4)
i965: Fix null register use in Sandybridge implied move resolution.
Fixes regressions caused by commit 9a21bc6401, namely GPU hangs when
running gnome-shell or compiz (Mesa bugs #35820 and #35853).
I incorrectly refactored the case that dealt with ARF_NULL; even in that
case, the source register needs to be changed to the MRF.
NOTE: This is a candidate for the 7.10 branch (if 9a21bc6401 is
cherry-picked, take this one too).
(cherry picked from commit a019dd0d6e5bba00e8ee7818e004ee42ca507102)
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 67 ++++++++++++++----------------
1 files changed, 31 insertions(+), 36 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 88131c4..33b6412 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -52,6 +52,34 @@ static void guess_execution_size(struct brw_compile *p,
}
+/**
+ * Prior to Sandybridge, the SEND instruction accepted non-MRF source
+ * registers, implicitly moving the operand to a message register.
+ *
+ * On Sandybridge, this is no longer the case. This function performs the
+ * explicit move; it should be called before emitting a SEND instruction.
+ */
+static void
+gen6_resolve_implied_move(struct brw_compile *p,
+ struct brw_reg *src,
+ GLuint msg_reg_nr)
+{
+ struct intel_context *intel = &p->brw->intel;
+ if (intel->gen != 6)
+ return;
+
+ if (src->file != BRW_ARCHITECTURE_REGISTER_FILE || src->nr != BRW_ARF_NULL) {
+ brw_push_insn_state(p);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
+ retype(*src, BRW_REGISTER_TYPE_UD));
+ brw_pop_insn_state(p);
+ }
+ *src = brw_message_reg(msg_reg_nr);
+}
+
+
static void brw_set_dest(struct brw_compile *p,
struct brw_instruction *insn,
struct brw_reg dest)
@@ -1966,20 +1994,7 @@ void brw_SAMPLE(struct brw_compile *p,
{
struct brw_instruction *insn;
- /* Sandybridge doesn't have the implied move for SENDs,
- * and the first message register index comes from src0.
- */
- if (intel->gen >= 6) {
- if (src0.file != BRW_ARCHITECTURE_REGISTER_FILE ||
- src0.nr != BRW_ARF_NULL) {
- brw_push_insn_state(p);
- brw_set_mask_control( p, BRW_MASK_DISABLE );
- brw_set_compression_control(p, BRW_COMPRESSION_NONE);
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), src0.type), src0);
- brw_pop_insn_state(p);
- }
- src0 = brw_message_reg(msg_reg_nr);
- }
+ gen6_resolve_implied_move(p, &src0, msg_reg_nr);
insn = next_insn(p, BRW_OPCODE_SEND);
insn->header.predicate_control = 0; /* XXX */
@@ -2034,17 +2049,7 @@ void brw_urb_WRITE(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- /* Sandybridge doesn't have the implied move for SENDs,
- * and the first message register index comes from src0.
- */
- if (intel->gen >= 6) {
- brw_push_insn_state(p);
- brw_set_mask_control( p, BRW_MASK_DISABLE );
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
- retype(src0, BRW_REGISTER_TYPE_UD));
- brw_pop_insn_state(p);
- src0 = brw_message_reg(msg_reg_nr);
- }
+ gen6_resolve_implied_move(p, &src0, msg_reg_nr);
insn = next_insn(p, BRW_OPCODE_SEND);
@@ -2154,17 +2159,7 @@ void brw_ff_sync(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- /* Sandybridge doesn't have the implied move for SENDs,
- * and the first message register index comes from src0.
- */
- if (intel->gen >= 6) {
- brw_push_insn_state(p);
- brw_set_mask_control( p, BRW_MASK_DISABLE );
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
- retype(src0, BRW_REGISTER_TYPE_UD));
- brw_pop_insn_state(p);
- src0 = brw_message_reg(msg_reg_nr);
- }
+ gen6_resolve_implied_move(p, &src0, msg_reg_nr);
insn = next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, dest);
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