Mesa (master): r600g: make r600_drawl inherit pipe_draw_info
Marek Olšák
mareko at kemper.freedesktop.org
Sun Jan 30 02:30:40 UTC 2011
Module: Mesa
Branch: master
Commit: 5cefe1eddd4854490aebdf4f138ffb07aa59073c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cefe1eddd4854490aebdf4f138ffb07aa59073c
Author: Marek Olšák <maraeo at gmail.com>
Date: Fri Jan 28 21:55:28 2011 +0100
r600g: make r600_drawl inherit pipe_draw_info
---
src/gallium/drivers/r600/evergreen_state.c | 37 ++++++++++-----------------
src/gallium/drivers/r600/r600_buffer.c | 2 +-
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/r600/r600_pipe.h | 9 +-----
src/gallium/drivers/r600/r600_state.c | 34 +++++++++----------------
5 files changed, 30 insertions(+), 54 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 2c9dd47..7fb64d2 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1432,43 +1432,34 @@ void evergreen_vertex_buffer_update(struct r600_pipe_context *rctx)
}
int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
-void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info)
+
+void evergreen_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_resource *rbuffer;
u32 vgt_dma_index_type, vgt_draw_initiator, mask;
struct r600_draw rdraw;
struct r600_pipe_state vgt;
- struct r600_drawl draw;
+ struct r600_drawl draw = {};
unsigned prim;
- memset(&draw, 0, sizeof(struct r600_drawl));
+ draw.info = *info;
draw.ctx = ctx;
- draw.mode = info->mode;
- draw.start = info->start;
- draw.count = info->count;
if (info->indexed && rctx->index_buffer.buffer) {
- draw.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
- draw.min_index = info->min_index;
- draw.max_index = info->max_index;
- draw.index_bias = info->index_bias;
+ draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
r600_translate_index_buffer(rctx, &rctx->index_buffer.buffer,
&rctx->index_buffer.index_size,
- &draw.start,
+ &draw.info.start,
info->count);
draw.index_size = rctx->index_buffer.index_size;
pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
- draw.index_buffer_offset = draw.start * draw.index_size;
- draw.start = 0;
+ draw.index_buffer_offset = draw.info.start * draw.index_size;
+ draw.info.start = 0;
r600_upload_index_buffer(rctx, &draw);
} else {
- draw.index_size = 0;
- draw.index_buffer = NULL;
- draw.min_index = info->min_index;
- draw.max_index = info->max_index;
- draw.index_bias = info->start;
+ draw.info.index_bias = info->start;
}
switch (draw.index_size) {
@@ -1488,7 +1479,7 @@ void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info)
R600_ERR("unsupported index size %d\n", draw.index_size);
return;
}
- if (r600_conv_pipe_prim(draw.mode, &prim))
+ if (r600_conv_pipe_prim(draw.info.mode, &prim))
return;
if (unlikely(rctx->ps_shader == NULL)) {
R600_ERR("missing vertex shader\n");
@@ -1515,15 +1506,15 @@ void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info)
vgt.id = R600_PIPE_STATE_VGT;
vgt.nregs = 0;
r600_pipe_state_add_reg(&vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw.index_bias, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.max_index, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.min_index, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL);
r600_context_pipe_state_set(&rctx->ctx, &vgt);
- rdraw.vgt_num_indices = draw.count;
+ rdraw.vgt_num_indices = draw.info.count;
rdraw.vgt_num_instances = 1;
rdraw.vgt_index_type = vgt_dma_index_type;
rdraw.vgt_draw_initiator = vgt_draw_initiator;
diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c
index f224754..024bbc2 100644
--- a/src/gallium/drivers/r600/r600_buffer.c
+++ b/src/gallium/drivers/r600/r600_buffer.c
@@ -207,7 +207,7 @@ void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl
boolean flushed;
u_upload_data(rctx->upload_vb, 0,
- draw->count * draw->index_size,
+ draw->info.count * draw->index_size,
rbuffer->user_buffer,
&draw->index_buffer_offset,
&draw->index_buffer, &flushed);
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 824cf7f..71054fe 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -154,7 +154,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
case CHIP_BARTS:
case CHIP_TURKS:
case CHIP_CAICOS:
- rctx->context.draw_vbo = evergreen_draw;
+ rctx->context.draw_vbo = evergreen_draw_vbo;
evergreen_init_state_functions(rctx);
if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
r600_destroy_context(&rctx->context);
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 8d5e3c3..9491268 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -171,13 +171,8 @@ struct r600_pipe_context {
};
struct r600_drawl {
+ struct pipe_draw_info info;
struct pipe_context *ctx;
- unsigned mode;
- unsigned min_index;
- unsigned max_index;
- unsigned index_bias;
- unsigned start;
- unsigned count;
unsigned index_size;
unsigned index_buffer_offset;
struct pipe_resource *index_buffer;
@@ -186,7 +181,7 @@ struct r600_drawl {
/* evergreen_state.c */
void evergreen_init_state_functions(struct r600_pipe_context *rctx);
void evergreen_init_config(struct r600_pipe_context *rctx);
-void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info);
+void evergreen_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx);
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 0191a11..8501caf 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -223,7 +223,7 @@ static void r600_draw_common(struct r600_drawl *draw)
R600_ERR("unsupported index size %d\n", draw->index_size);
return;
}
- if (r600_conv_pipe_prim(draw->mode, &prim))
+ if (r600_conv_pipe_prim(draw->info.mode, &prim))
return;
if (unlikely(rctx->ps_shader == NULL)) {
R600_ERR("missing vertex shader\n");
@@ -250,15 +250,15 @@ static void r600_draw_common(struct r600_drawl *draw)
vgt.id = R600_PIPE_STATE_VGT;
vgt.nregs = 0;
r600_pipe_state_add_reg(&vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw->index_bias, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw->max_index, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw->min_index, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028408_VGT_INDX_OFFSET, draw->info.index_bias, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw->info.max_index, 0xFFFFFFFF, NULL);
+ r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw->info.min_index, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL);
r600_context_pipe_state_set(&rctx->ctx, &vgt);
- rdraw.vgt_num_indices = draw->count;
+ rdraw.vgt_num_indices = draw->info.count;
rdraw.vgt_num_instances = 1;
rdraw.vgt_index_type = vgt_dma_index_type;
rdraw.vgt_draw_initiator = vgt_draw_initiator;
@@ -274,35 +274,25 @@ static void r600_draw_common(struct r600_drawl *draw)
void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
- struct r600_drawl draw;
+ struct r600_drawl draw = {};
- memset(&draw, 0, sizeof(struct r600_drawl));
+ draw.info = *info;
draw.ctx = ctx;
- draw.mode = info->mode;
- draw.start = info->start;
- draw.count = info->count;
if (info->indexed && rctx->index_buffer.buffer) {
- draw.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
- draw.min_index = info->min_index;
- draw.max_index = info->max_index;
- draw.index_bias = info->index_bias;
+ draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
r600_translate_index_buffer(rctx, &rctx->index_buffer.buffer,
&rctx->index_buffer.index_size,
- &draw.start,
+ &draw.info.start,
info->count);
draw.index_size = rctx->index_buffer.index_size;
pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
- draw.index_buffer_offset = draw.start * draw.index_size;
- draw.start = 0;
+ draw.index_buffer_offset = draw.info.start * draw.index_size;
+ draw.info.start = 0;
r600_upload_index_buffer(rctx, &draw);
} else {
- draw.index_size = 0;
- draw.index_buffer = NULL;
- draw.min_index = info->min_index;
- draw.max_index = info->max_index;
- draw.index_bias = info->start;
+ draw.info.index_bias = info->start;
}
r600_draw_common(&draw);
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