Mesa (master): r600g: force new evergreen blocks for large range.

Dave Airlie airlied at kemper.freedesktop.org
Wed Jun 1 22:17:49 PDT 2011


Module: Mesa
Branch: master
Commit: 8fcafeb4757215d1cf56e1e0a2cc57837379475c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fcafeb4757215d1cf56e1e0a2cc57837379475c

Author: Dave Airlie <airlied at redhat.com>
Date:   Thu Jun  2 14:21:39 2011 +1000

r600g: force new evergreen blocks for large range.

This range was 76 dwords long, the 75th dword changes, the first 60 or so
don't. split the block so it emits less often.

Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/gallium/winsys/r600/drm/evergreen_hw_context.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index fc42c41..0ffad25 100644
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -202,6 +202,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028610_PA_CL_UCP5_Y, 0, 0, 0},
 	{R_028614_PA_CL_UCP5_Z, 0, 0, 0},
 	{R_028618_PA_CL_UCP5_W, 0, 0, 0},
+	{GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
 	{R_02861C_SPI_VS_OUT_ID_0, 0, 0, 0},
 	{R_028620_SPI_VS_OUT_ID_1, 0, 0, 0},
 	{R_028624_SPI_VS_OUT_ID_2, 0, 0, 0},
@@ -212,6 +213,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028638_SPI_VS_OUT_ID_7, 0, 0, 0},
 	{R_02863C_SPI_VS_OUT_ID_8, 0, 0, 0},
 	{R_028640_SPI_VS_OUT_ID_9, 0, 0, 0},
+	{GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
 	{R_028644_SPI_PS_INPUT_CNTL_0, 0, 0, 0},
 	{R_028648_SPI_PS_INPUT_CNTL_1, 0, 0, 0},
 	{R_02864C_SPI_PS_INPUT_CNTL_2, 0, 0, 0},
@@ -244,6 +246,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_0286B8_SPI_PS_INPUT_CNTL_29, 0, 0, 0},
 	{R_0286BC_SPI_PS_INPUT_CNTL_30, 0, 0, 0},
 	{R_0286C0_SPI_PS_INPUT_CNTL_31, 0, 0, 0},
+	{GROUP_FORCE_NEW_BLOCK, 0, 0, 0},
 	{R_0286C4_SPI_VS_OUT_CONFIG, 0, 0, 0},
 	{R_0286C8_SPI_THREAD_GROUPING, 0, 0, 0},
 	{R_0286CC_SPI_PS_IN_CONTROL_0, 0, 0, 0},



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