Mesa (master): r600g: Use the bitfield define matching the register it is used for.

[Mathias Fröhlich]

Module: Mesa
Branch: master
Commit: e556983fc8f0ac9046c5a5e3e34e8ea036587ac7
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e556983fc8f0ac9046c5a5e3e34e8ea036587ac7

Author: Mathias Fröhlich <Mathias.Froehlich at gmx.net>
Date:   Fri Sep 23 19:43:31 2011 +0200

r600g: Use the bitfield define matching the register it is used for.

Fix a typo that should result in the same code.

---

 src/gallium/drivers/r600/r600_state.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 03e6958..1aa4105 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2108,8 +2108,8 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
 				0, 0xFFFFFFFF, shader->bo, RADEON_USAGE_READ);
 	r600_pipe_state_add_reg(rstate,
 				R_028850_SQ_PGM_RESOURCES_PS,
-				S_028868_NUM_GPRS(rshader->bc.ngpr) |
-				S_028868_STACK_SIZE(rshader->bc.nstack),
+				S_028850_NUM_GPRS(rshader->bc.ngpr) |
+				S_028850_STACK_SIZE(rshader->bc.nstack),
 				0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate,
 				R_028854_SQ_PGM_EXPORTS_PS,