Mesa (master): i965/fs: Implement texelFetch() on Gen4.
Kenneth Graunke
kwg at kemper.freedesktop.org
Mon Sep 19 15:34:28 PDT 2011
Module: Mesa
Branch: master
Commit: 47b556fbcaea4660b21481e40d89167d883d47f5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47b556fbcaea4660b21481e40d89167d883d47f5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Sep 6 16:39:01 2011 -0700
i965/fs: Implement texelFetch() on Gen4.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
---
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 5 +++++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 17 +++++++++++++----
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 906c158..f742e84 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -295,6 +295,11 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src)
assert(inst->mlen == 7 || inst->mlen == 10);
msg_type = BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS;
break;
+ case FS_OPCODE_TXF:
+ assert(inst->mlen == 9);
+ msg_type = BRW_SAMPLER_MESSAGE_SIMD16_LD;
+ simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
+ break;
case FS_OPCODE_TXS:
assert(inst->mlen == 3);
msg_type = BRW_SAMPLER_MESSAGE_SIMD16_RESINFO;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 2c8d160..3604231 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -678,17 +678,25 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
* instructions. We'll need to do SIMD16 here.
*/
simd16 = true;
- assert(ir->op == ir_txb || ir->op == ir_txl);
+ assert(ir->op == ir_txb || ir->op == ir_txl || ir->op == ir_txf);
for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
fs_inst *inst = emit(BRW_OPCODE_MOV, fs_reg(MRF,
- base_mrf + mlen + i * 2),
+ base_mrf + mlen + i * 2,
+ coordinate.type),
coordinate);
if (i < 3 && c->key.gl_clamp_mask[i] & (1 << sampler))
inst->saturate = true;
coordinate.reg_offset++;
}
+ /* Initialize the rest of u/v/r with 0.0. Empirically, this seems to
+ * be necessary for TXF (ld), but seems wise to do for all messages.
+ */
+ for (int i = ir->coordinate->type->vector_elements; i < 3; i++) {
+ emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i * 2), fs_reg(0.0f));
+ }
+
/* lod/bias appears after u/v/r. */
mlen += 6;
@@ -698,7 +706,8 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
mlen++;
} else {
ir->lod_info.lod->accept(this);
- emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), this->result);
+ emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, this->result.type),
+ this->result);
mlen++;
}
@@ -737,7 +746,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
inst = emit(FS_OPCODE_TXS, dst);
break;
case ir_txf:
- assert(!"GLSL 1.30 features unsupported");
+ inst = emit(FS_OPCODE_TXF, dst);
break;
}
inst->base_mrf = base_mrf;
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