Mesa (master): intel: Introduce a new intel_context:: gt field to go along with gen.

Kenneth Graunke kwg at kemper.freedesktop.org
Mon Sep 26 11:50:03 PDT 2011


Module: Mesa
Branch: master
Commit: 490e6470a09c3a6049e5e859d72b0b679ef5d070
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=490e6470a09c3a6049e5e859d72b0b679ef5d070

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Sep 24 01:10:04 2011 -0700

intel: Introduce a new intel_context::gt field to go along with gen.

It seems that GT1/GT2 sorts of variations are here to stay, and more
special cases will likely be required in the future.  Checking by PCI ID
via the IS_xxx_GTx macros is cumbersome; introducing a new 'gt' field
analogous to intel->gen will make this easier.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_context.c    |    6 +++---
 src/mesa/drivers/dri/intel/intel_context.c |    7 +++++++
 src/mesa/drivers/dri/intel/intel_context.h |    1 +
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 95eb357..9aabb7a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -181,13 +181,13 @@ GLboolean brwCreateContext( int api,
 
    /* WM maximum threads is number of EUs times number of threads per EU. */
    if (intel->gen >= 7) {
-      if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
+      if (intel->gt == 1) {
 	 brw->wm_max_threads = 86;
 	 brw->vs_max_threads = 36;
 	 brw->urb.size = 128;
 	 brw->urb.max_vs_entries = 512;
 	 brw->urb.max_gs_entries = 192;
-      } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
+      } else if (intel->gt == 2) {
 	 brw->wm_max_threads = 86;
 	 brw->vs_max_threads = 128;
 	 brw->urb.size = 256;
@@ -197,7 +197,7 @@ GLboolean brwCreateContext( int api,
 	 assert(!"Unknown gen7 device.");
       }
    } else if (intel->gen == 6) {
-      if (IS_SNB_GT2(intel->intelScreen->deviceID)) {
+      if (intel->gt == 2) {
 	 /* This could possibly be 80, but is supposed to require
 	  * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
 	  * GPU reset to change.
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index ecd0c2b..7f8347e 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -617,6 +617,13 @@ intelInitContext(struct intel_context *intel,
 
    const int devID = intelScreen->deviceID;
 
+   if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID))
+      intel->gt = 1;
+   else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID))
+      intel->gt = 2;
+   else
+      intel->gt = 0;
+
    if (IS_G4X(devID)) {
       intel->is_g4x = true;
    } else if (IS_945(devID)) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 171814d..eb78c00 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -166,6 +166,7 @@ struct intel_context
     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
     */
    int gen;
+   int gt;
    GLboolean needs_ff_sync;
    GLboolean is_g4x;
    GLboolean is_945;



More information about the mesa-commit mailing list