Mesa (master): r600g: fix CB_SHADER_MASK and CB_TARGET_MASK for r6xx
Marek Olšák
mareko at kemper.freedesktop.org
Thu Aug 30 17:45:04 UTC 2012
Module: Mesa
Branch: master
Commit: 863e2c85b9c59d717ad786c709638d948ff0f38e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=863e2c85b9c59d717ad786c709638d948ff0f38e
Author: Marek Olšák <maraeo at gmail.com>
Date: Sun Aug 26 22:33:55 2012 +0200
r600g: fix CB_SHADER_MASK and CB_TARGET_MASK for r6xx
---
src/gallium/drivers/r600/r600_state.c | 35 ++++++++++++++++++++++----------
1 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 5b83f51..3e5958a 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1666,17 +1666,30 @@ static void r600_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom
{
struct radeon_winsys_cs *cs = rctx->cs;
struct r600_cb_misc_state *a = (struct r600_cb_misc_state*)atom;
- unsigned fb_colormask = (1ULL << ((unsigned)a->nr_cbufs * 4)) - 1;
- unsigned ps_colormask = (1ULL << ((unsigned)a->nr_ps_color_outputs * 4)) - 1;
- unsigned multiwrite = a->multiwrite && a->nr_cbufs > 1;
-
- r600_write_context_reg_seq(cs, R_028238_CB_TARGET_MASK, 2);
- r600_write_value(cs, a->blend_colormask & fb_colormask); /* R_028238_CB_TARGET_MASK */
- /* Always enable the first color output to make sure alpha-test works even without one. */
- r600_write_value(cs, 0xf | (multiwrite ? fb_colormask : ps_colormask)); /* R_02823C_CB_SHADER_MASK */
- r600_write_context_reg(cs, R_028808_CB_COLOR_CONTROL,
- a->cb_color_control |
- S_028808_MULTIWRITE_ENABLE(multiwrite));
+
+ if (G_028808_SPECIAL_OP(a->cb_color_control) == V_028808_SPECIAL_RESOLVE_BOX) {
+ r600_write_context_reg_seq(cs, R_028238_CB_TARGET_MASK, 2);
+ if (rctx->chip_class == R600) {
+ r600_write_value(cs, 0xff); /* R_028238_CB_TARGET_MASK */
+ r600_write_value(cs, 0xff); /* R_02823C_CB_SHADER_MASK */
+ } else {
+ r600_write_value(cs, 0xf); /* R_028238_CB_TARGET_MASK */
+ r600_write_value(cs, 0xf); /* R_02823C_CB_SHADER_MASK */
+ }
+ r600_write_context_reg(cs, R_028808_CB_COLOR_CONTROL, a->cb_color_control);
+ } else {
+ unsigned fb_colormask = (1ULL << ((unsigned)a->nr_cbufs * 4)) - 1;
+ unsigned ps_colormask = (1ULL << ((unsigned)a->nr_ps_color_outputs * 4)) - 1;
+ unsigned multiwrite = a->multiwrite && a->nr_cbufs > 1;
+
+ r600_write_context_reg_seq(cs, R_028238_CB_TARGET_MASK, 2);
+ r600_write_value(cs, a->blend_colormask & fb_colormask); /* R_028238_CB_TARGET_MASK */
+ /* Always enable the first color output to make sure alpha-test works even without one. */
+ r600_write_value(cs, 0xf | (multiwrite ? fb_colormask : ps_colormask)); /* R_02823C_CB_SHADER_MASK */
+ r600_write_context_reg(cs, R_028808_CB_COLOR_CONTROL,
+ a->cb_color_control |
+ S_028808_MULTIWRITE_ENABLE(multiwrite));
+ }
}
static void r600_emit_db_misc_state(struct r600_context *rctx, struct r600_atom *atom)
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