Mesa (master): radeon/llvm: Add support for RCP instruction on SI

[Tom Stellard]

Module: Mesa
Branch: master
Commit: ee45dec7c4a673cfa3ce158bdfb7df8aa4282f92
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee45dec7c4a673cfa3ce158bdfb7df8aa4282f92

Author: Tom Stellard <thomas.stellard at amd.com>
Date:   Fri Aug 31 09:59:00 2012 -0400

radeon/llvm: Add support for RCP instruction on SI

---

 src/gallium/drivers/radeon/SIInstructions.td |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td
index 6653a66..7802ec6 100644
--- a/src/gallium/drivers/radeon/SIInstructions.td
+++ b/src/gallium/drivers/radeon/SIInstructions.td
@@ -532,7 +532,9 @@ defm V_LOG_CLAMP_F32 : VOP1_32 <0x00000026, "V_LOG_CLAMP_F32", []>;
 defm V_LOG_F32 : VOP1_32 <0x00000027, "V_LOG_F32", []>;
 defm V_RCP_CLAMP_F32 : VOP1_32 <0x00000028, "V_RCP_CLAMP_F32", []>;
 defm V_RCP_LEGACY_F32 : VOP1_32 <0x00000029, "V_RCP_LEGACY_F32", []>;
-defm V_RCP_F32 : VOP1_32 <0x0000002a, "V_RCP_F32", []>;
+defm V_RCP_F32 : VOP1_32 <0x0000002a, "V_RCP_F32",
+  [(set VReg_32:$dst, (int_AMDGPU_rcp AllReg_32:$src0))]
+>;
 defm V_RCP_IFLAG_F32 : VOP1_32 <0x0000002b, "V_RCP_IFLAG_F32", []>;
 defm V_RSQ_CLAMP_F32 : VOP1_32 <0x0000002c, "V_RSQ_CLAMP_F32", []>;
 defm V_RSQ_LEGACY_F32 : VOP1_32 <