Mesa (master): r600g: fix tex tile_type offset for cayman
Alex Deucher
agd5f at kemper.freedesktop.org
Fri Feb 10 16:32:36 UTC 2012
Module: Mesa
Branch: master
Commit: acca690c259824636ef1ff684a10bd1caca4751f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=acca690c259824636ef1ff684a10bd1caca4751f
Author: Alex Deucher <alexander.deucher at amd.com>
Date: Fri Feb 10 10:49:13 2012 -0500
r600g: fix tex tile_type offset for cayman
Noticed by taiu on IRC.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Note: this is a candidate for the stable branches.
---
src/gallium/drivers/r600/evergreen_state.c | 5 ++++-
src/gallium/drivers/r600/evergreend.h | 3 +++
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index dd67e4b..56a497b 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1190,8 +1190,11 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
rstate->val[0] = (S_030000_DIM(r600_tex_dim(texture->target)) |
S_030000_PITCH((pitch / 8) - 1) |
- S_030000_NON_DISP_TILING_ORDER(tile_type) |
S_030000_TEX_WIDTH(width - 1));
+ if (rscreen->chip_class == CAYMAN)
+ rstate->val[0] |= CM_S_030000_NON_DISP_TILING_ORDER(tile_type);
+ else
+ rstate->val[0] |= S_030000_NON_DISP_TILING_ORDER(tile_type);
rstate->val[1] = (S_030004_TEX_HEIGHT(height - 1) |
S_030004_TEX_DEPTH(depth - 1) |
S_030004_ARRAY_MODE(array_mode));
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index 1d87076..d1dbd84 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -966,6 +966,9 @@
#define S_030000_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 5)
#define G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 5) & 0x1)
#define C_030000_NON_DISP_TILING_ORDER 0xFFFFFFDF
+#define CM_S_030000_NON_DISP_TILING_ORDER(x) (((x) & 0x3) << 4)
+#define CM_G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x3)
+#define CM_C_030000_NON_DISP_TILING_ORDER 0xFFFFFFCF
#define S_030000_PITCH(x) (((x) & 0xFFF) << 6)
#define G_030000_PITCH(x) (((x) >> 6) & 0xFFF)
#define C_030000_PITCH 0xFFFC003F
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