Mesa (8.0): i965: Rewrite the HiZ op

Wed Feb 15 01:47:36 UTC 2012

Module: Mesa
Branch: 8.0
Commit: e1f9820b47e3f124c49cd2ab4e09328e0cc3e638
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1f9820b47e3f124c49cd2ab4e09328e0cc3e638

Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Thu Jan 26 11:01:36 2012 -0800

i965: Rewrite the HiZ op

This is a combination of 4 commits. The first commit rewrites the HiZ op,
and remaining three fix bugs introduced by the rewrite.

======== commit 1 ========

i965: Rewrite the HiZ op

The HiZ op was implemented as a meta-op. This patch reimplements it by
emitting a special HiZ batch. This fixes several known bugs, and likely
a lot of undiscovered ones too.

==== Why the HiZ meta-op needed to die ====

The HiZ op was implemented as a meta-op, which caused lots of trouble. All
other meta-ops occur as a result of some GL call (for example, glClear and
glGenerateMipmap), but the HiZ meta-op was special. It was called in
places that Mesa (in particular, the vbo and swrast modules) did not
expect---and were not prepared for---state changes to occur (for example:
glDraw; glCallList; within glBegin/End blocks; and within
swrast_prepare_render as a result of intel_miptree_map).

In an attempt to work around these unexpected state changes, I added two
hooks in i965:
  - A hook for glDraw, located in brw_predraw_resolve_buffers (which is
    called in the glDraw path). This hook detected if a predraw resolve
    meta-op had occurred, and would hackishly repropagate some GL state
    if necessary. This ensured that the meta-op state changes would not
    intefere with the vbo module's subsequent execution of glDraw.
  - A hook for glBegin, implemented by brwPrepareExecBegin. This hook
    resolved all buffers before entering
    a glBegin/End block, thus preventing an infinitely recurring call to
    vbo_exec_FlushVertices. The vbo module calls vbo_exec_FlushVertices to
    flush its vertex queue in response to GL state changes.

Unfortunately, these hooks were not sufficient. The meta-op state changes
still interacted badly with glPopAttrib (as discovered in bug 44927) and
with swrast rendering (as discovered by debugging gen6's swrast fallback
for glBitmap). I expect there are more undiscovered bugs. Rather than play
whack-a-mole in a minefield, the sane approach is to replace the HiZ
meta-op with something safer.

==== How it was killed ====

This patch consists of several logical components:
  1. Rewrite the HiZ op by replacing function gen6_resolve_slice with
     gen6_hiz_exec and gen7_hiz_exec. The new functions do not call
     a meta-op, but instead manually construct and emit a batch to "draw"
     the HiZ op's rectangle primitive. The new functions alter no GL
     state.
  2. Add fields to brw_context::hiz for the new HiZ op.
  3. Emit a workaround flush when toggling 3DSTATE_VS.VsFunctionEnable.
  4. Kill all dead HiZ code:
     - the function gen6_resolve_slice
     - the dirty flag BRW_NEW_HIZ
     - the dead fields in brw_context::hiz
     - the state packet manipulation triggered by the now removed
       brw_context::hiz::op
     - the meta-op workaround in brw_predraw_resolve_buffers (discussed
       above)
     - the meta-op workaround brwPrepareExecBegin (discussed above)

Note: This is a candidate for the 8.0 branch.
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Paul Berry <stereotype441 at gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43327
Reported-by: xunx.fang at intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44927
Reported-by: chao.a.chen at intel.com
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
(cherry picked from commit 7b36c68ba6899c7f30fd56b7ef07a78b027771ac)

======== commit 2 ========

i965/gen7: Fix GPU hangs from the HiZ op.

The wm max threads is in the same dword as the dispatch enable.  The
hardware gets super angry if you set max threads to 0, even if you
aren't dispatching threads.
(cherry picked from commit e5b225afbd581ccf5d61e9d6c566e26e74abe91e)

======== commit 3 ========

i965/gen7: Fix the length of the DS state packet in the HiZ op.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
(cherry picked from commit cdcfaa64e3a237517a1e1c913e8ea18d8bc5fa63)

======== commit 4 ========

i965/gen7: Fix the length of the MULTISAMPLE state packet in the HiZ op.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
(cherry picked from commit a7750c9fb5db9d76318c35a901f5359bf586cddf)

---

 src/mesa/drivers/dri/i965/Makefile.sources    |    1 +
 src/mesa/drivers/dri/i965/brw_context.c       |   55 --
 src/mesa/drivers/dri/i965/brw_context.h       |   40 +-
 src/mesa/drivers/dri/i965/brw_draw.c          |   47 +--
 src/mesa/drivers/dri/i965/brw_state_upload.c  |    1 -
 src/mesa/drivers/dri/i965/brw_vtbl.c          |   14 +-
 src/mesa/drivers/dri/i965/gen6_clip_state.c   |   20 +-
 src/mesa/drivers/dri/i965/gen6_depthstencil.c |    9 +-
 src/mesa/drivers/dri/i965/gen6_hiz.c          |  830 ++++++++++++++++--------
 src/mesa/drivers/dri/i965/gen6_hiz.h          |   38 ++
 src/mesa/drivers/dri/i965/gen6_sf_state.c     |   16 +-
 src/mesa/drivers/dri/i965/gen6_vs_state.c     |    9 +
 src/mesa/drivers/dri/i965/gen6_wm_state.c     |   20 +-
 src/mesa/drivers/dri/i965/gen7_clip_state.c   |   20 +-
 src/mesa/drivers/dri/i965/gen7_hiz.c          |  464 ++++++++++++++
 src/mesa/drivers/dri/i965/gen7_hiz.h          |   43 ++
 src/mesa/drivers/dri/i965/gen7_sf_state.c     |   19 +-
 src/mesa/drivers/dri/i965/gen7_wm_state.c     |   18 -
 18 files changed, 1147 insertions(+), 517 deletions(-)

Diff:   http://cgit.freedesktop.org/mesa/mesa/diff/?id=e1f9820b47e3f124c49cd2ab4e09328e0cc3e638