Mesa (master): glsl: Bitwise conversion operator support in the software renderers.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: e16b0a51be7866f3856b62b295df2bcf49e02384
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e16b0a51be7866f3856b62b295df2bcf49e02384

Author: Olivier Galibert <galibert at pobox.com>
Date:   Tue May  8 20:40:36 2012 +0200

glsl: Bitwise conversion operator support in the software renderers.

TGSI doesn't need an opcode, since registers are untyped (but beware
once doubles come into the scene).  Mesa IR doesn't handle native
integers, so trying to handle them there is worthless, the case
entries are only added for warning reasons.

It was only tested with softpipe, since llvmpipe doesn't support glsl
1.3 yet.

Signed-off-by: Olivier Galibert <galibert at pobox.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/program/ir_to_mesa.cpp            |    5 +++++
 src/mesa/state_tracker/st_glsl_to_tgsi.cpp |    6 ++++++
 2 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index c021c69..2245400 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1407,6 +1407,11 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
       emit(ir, OPCODE_SNE, result_dst,
 			  op[0], src_reg_for_float(0.0));
       break;
+   case ir_unop_bitcast_f2i: // Ignore these 4, they can't happen here anyway
+   case ir_unop_bitcast_f2u:
+   case ir_unop_bitcast_i2f:
+   case ir_unop_bitcast_u2f:
+      break;
    case ir_unop_trunc:
       emit(ir, OPCODE_TRUNC, result_dst, op[0]);
       break;
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index e8d60f8..347a22f 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1762,6 +1762,12 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
       else
          emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
       break;
+   case ir_unop_bitcast_f2i:
+   case ir_unop_bitcast_f2u:
+   case ir_unop_bitcast_i2f:
+   case ir_unop_bitcast_u2f:
+      result_src = op[0];
+      break;
    case ir_unop_f2b:
       emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
       break;