Mesa (master): radeon/llvm: Expand UDIV and UREM nodes

[Tom Stellard]

Module: Mesa
Branch: master
Commit: c01199dfc0d30ad4c20cc4a2ebe3cdcbc74debb6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c01199dfc0d30ad4c20cc4a2ebe3cdcbc74debb6

Author: Tom Stellard <thomas.stellard at amd.com>
Date:   Wed Jun 27 21:09:51 2012 +0000

radeon/llvm: Expand UDIV and UREM nodes

---

 src/gallium/drivers/radeon/AMDGPUISelLowering.cpp |    7 +++----
 1 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
index 9d076bd..544de0f 100644
--- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
@@ -33,8 +33,10 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
   setOperationAction(ISD::FEXP2,  MVT::f32, Legal);
   setOperationAction(ISD::FRINT,  MVT::f32, Legal);
 
-  setOperationAction(ISD::UDIV, MVT::i32, Custom);
+
+  setOperationAction(ISD::UDIV, MVT::i32, Expand);
   setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
+  setOperationAction(ISD::UREM, MVT::i32, Expand);
 }
 
 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
@@ -44,9 +46,6 @@ SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
   default: return AMDILTargetLowering::LowerOperation(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
   case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
-  case ISD::UDIV:
-    return DAG.getNode(ISD::UDIVREM, Op.getDebugLoc(), Op.getValueType(),
-                       Op.getOperand(0), Op.getOperand(1)).getValue(0);
   case ISD::UDIVREM: return LowerUDIVREM(Op, DAG);
   }
 }