Mesa (master): radeonsi: Properly translate vertex format swizzle.

[Michel Dänzer]

Module: Mesa
Branch: master
Commit: c2f1fbf912c0b95e09cb64db10dfbe8abff9f5d6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2f1fbf912c0b95e09cb64db10dfbe8abff9f5d6

Author: Michel Dänzer <michel.daenzer at amd.com>
Date:   Fri May 11 11:52:16 2012 +0200

radeonsi: Properly translate vertex format swizzle.

egltri_screen works correctly!

---

 src/gallium/drivers/radeonsi/evergreen_state.c   |   18 ------------------
 src/gallium/drivers/radeonsi/r600_state_common.c |    9 ++++-----
 src/gallium/drivers/radeonsi/radeonsi_pipe.h     |   19 +++++++++++++++++++
 3 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/evergreen_state.c b/src/gallium/drivers/radeonsi/evergreen_state.c
index c7e4a13..6d345b0 100644
--- a/src/gallium/drivers/radeonsi/evergreen_state.c
+++ b/src/gallium/drivers/radeonsi/evergreen_state.c
@@ -1166,24 +1166,6 @@ static void si_delete_sampler_state(struct pipe_context *ctx,
 	free(state);
 }
 
-static unsigned si_map_swizzle(unsigned swizzle)
-{
-	switch (swizzle) {
-	case UTIL_FORMAT_SWIZZLE_Y:
-		return V_008F1C_SQ_SEL_Y;
-	case UTIL_FORMAT_SWIZZLE_Z:
-		return V_008F1C_SQ_SEL_Z;
-	case UTIL_FORMAT_SWIZZLE_W:
-		return V_008F1C_SQ_SEL_W;
-	case UTIL_FORMAT_SWIZZLE_0:
-		return V_008F1C_SQ_SEL_0;
-	case UTIL_FORMAT_SWIZZLE_1:
-		return V_008F1C_SQ_SEL_1;
-	default: /* UTIL_FORMAT_SWIZZLE_X */
-		return V_008F1C_SQ_SEL_X;
-	}
-}
-
 static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_context *ctx,
 							struct pipe_resource *texture,
 							const struct pipe_sampler_view *state)
diff --git a/src/gallium/drivers/radeonsi/r600_state_common.c b/src/gallium/drivers/radeonsi/r600_state_common.c
index ebed5b3..416c890 100644
--- a/src/gallium/drivers/radeonsi/r600_state_common.c
+++ b/src/gallium/drivers/radeonsi/r600_state_common.c
@@ -630,11 +630,10 @@ static void r600_vertex_buffer_update(struct r600_context *rctx)
 				  vertex_buffer->stride);
 		else
 			ptr[2] = vertex_buffer->buffer->width0 - offset;
-		/* XXX: Hardcoding RGBA */
-		ptr[3] = (S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
-			  S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
-			  S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-			  S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
+		ptr[3] = (S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) |
+			  S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) |
+			  S_008F0C_DST_SEL_Z(si_map_swizzle(desc->swizzle[2])) |
+			  S_008F0C_DST_SEL_W(si_map_swizzle(desc->swizzle[3])) |
 			  S_008F0C_NUM_FORMAT(num_format) |
 			  S_008F0C_DATA_FORMAT(data_format));
 
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
index 64ddd5d..3077f06 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
@@ -37,6 +37,7 @@
 #include "r600.h"
 #include "radeonsi_public.h"
 #include "r600_resource.h"
+#include "sid.h"
 
 #define R600_MAX_CONST_BUFFERS 1
 #define R600_MAX_CONST_BUFFER_SIZE 4096
@@ -467,6 +468,24 @@ static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
 }
 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 
+static INLINE unsigned si_map_swizzle(unsigned swizzle)
+{
+	switch (swizzle) {
+	case UTIL_FORMAT_SWIZZLE_Y:
+		return V_008F0C_SQ_SEL_Y;
+	case UTIL_FORMAT_SWIZZLE_Z:
+		return V_008F0C_SQ_SEL_Z;
+	case UTIL_FORMAT_SWIZZLE_W:
+		return V_008F0C_SQ_SEL_W;
+	case UTIL_FORMAT_SWIZZLE_0:
+		return V_008F0C_SQ_SEL_0;
+	case UTIL_FORMAT_SWIZZLE_1:
+		return V_008F0C_SQ_SEL_1;
+	default: /* UTIL_FORMAT_SWIZZLE_X */
+		return V_008F0C_SQ_SEL_X;
+	}
+}
+
 static inline unsigned r600_tex_aniso_filter(unsigned filter)
 {
 	if (filter <= 1)   return 0;