Mesa (master): radeon/llvm: Cleanup makefile
Tom Stellard
tstellar at kemper.freedesktop.org
Thu Sep 6 13:33:55 UTC 2012
Module: Mesa
Branch: master
Commit: cebbdd4ac23725963207bf6f8fc7101150e6065f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cebbdd4ac23725963207bf6f8fc7101150e6065f
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Wed Aug 29 13:01:15 2012 +0000
radeon/llvm: Cleanup makefile
Hopefully, this will fix all the parallel make problems people have
been having.
---
src/gallium/drivers/radeon/Makefile | 24 +++++++++++-------------
src/gallium/drivers/radeon/Makefile.sources | 26 ++++++++++++++++++++++++++
2 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeon/Makefile b/src/gallium/drivers/radeon/Makefile
index 43f668a..7f1c613 100644
--- a/src/gallium/drivers/radeon/Makefile
+++ b/src/gallium/drivers/radeon/Makefile
@@ -20,8 +20,6 @@ tablegen = $(TBLGEN) -I $(LLVM_INCLUDEDIR) $1 $2 -o $3
HAVE_LLVM_INTRINSICS = $(shell grep IntrinsicsR600.td $(LLVM_INCLUDEDIR)/llvm/Intrinsics.td)
-gen: $(GENERATED_SOURCES)
-
SIRegisterInfo.td: SIGenRegisterInfo.pl
$(PERL) $^ > $@
@@ -38,37 +36,37 @@ endif
R600RegisterInfo.td: R600GenRegisterInfo.pl
$(PERL) $^ > $@
-AMDGPUGenRegisterInfo.inc: *.td
+AMDGPUGenRegisterInfo.inc: $(TD_FILES)
$(call tablegen, -gen-register-info, AMDGPU.td, $@)
-AMDGPUGenInstrInfo.inc: *.td
+AMDGPUGenInstrInfo.inc: $(TD_FILES)
$(call tablegen, -gen-instr-info, AMDGPU.td, $@)
-AMDGPUGenAsmWriter.inc: *.td
+AMDGPUGenAsmWriter.inc: $(TD_FILES)
$(call tablegen, -gen-asm-writer, AMDGPU.td, $@)
-AMDGPUGenDAGISel.inc: *.td
+AMDGPUGenDAGISel.inc: $(TD_FILES)
$(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
-AMDGPUGenCallingConv.inc: *.td
+AMDGPUGenCallingConv.inc: $(TD_FILES)
$(call tablegen, -gen-callingconv, AMDGPU.td, $@)
-AMDGPUGenSubtargetInfo.inc: *.td
+AMDGPUGenSubtargetInfo.inc: $(TD_FILES)
$(call tablegen, -gen-subtarget, AMDGPU.td, $@)
-AMDGPUGenEDInfo.inc: *.td
+AMDGPUGenEDInfo.inc: $(TD_FILES)
$(call tablegen, -gen-enhanced-disassembly-info, AMDGPU.td, $@)
-AMDGPUGenIntrinsics.inc: *.td
+AMDGPUGenIntrinsics.inc: $(TD_FILES)
$(call tablegen, -gen-tgt-intrinsic, AMDGPU.td, $@)
-AMDGPUGenCodeEmitter.inc: *.td
+AMDGPUGenCodeEmitter.inc: $(TD_FILES)
$(call tablegen, -gen-emitter, AMDGPU.td, $@)
-AMDGPUGenMCCodeEmitter.inc: *.td
+AMDGPUGenMCCodeEmitter.inc: $(TD_FILES)
$(call tablegen, -mc-emitter -gen-emitter, AMDGPU.td, $@)
-AMDGPUGenDFAPacketizer.inc: *.td
+AMDGPUGenDFAPacketizer.inc: $(TD_FILES)
$(call tablegen, -gen-dfa-packetizer, AMDGPU.td, $@)
LOADER_LIBS=$(shell llvm-config --libs bitreader asmparser)
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index 2eb1120..333dd03 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -1,4 +1,30 @@
+TD_FILES := \
+ AMDGPU.td \
+ AMDGPUInstrInfo.td \
+ AMDGPUInstructions.td \
+ AMDGPUIntrinsics.td \
+ AMDGPURegisterInfo.td \
+ AMDILBase.td \
+ AMDILInstrInfo.td \
+ AMDILIntrinsics.td \
+ AMDILRegisterInfo.td \
+ Processors.td \
+ R600InstrInfo.td \
+ R600Instructions.td \
+ R600Intrinsics.td \
+ R600IntrinsicsNoOpenCL.td \
+ R600IntrinsicsOpenCL.td \
+ R600RegisterInfo.td \
+ R600Schedule.td \
+ SIInstrFormats.td \
+ SIInstrInfo.td \
+ SIInstructions.td \
+ SIIntrinsics.td \
+ SIRegisterInfo.td \
+ SISchedule.td
+
+
GENERATED_SOURCES := \
R600Intrinsics.td \
R600RegisterInfo.td \
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