Mesa (master): radeonsi: Fix calculation of number of records in buffer resource.
Michel Dänzer
daenzer at kemper.freedesktop.org
Wed Sep 12 13:26:52 UTC 2012
Module: Mesa
Branch: master
Commit: d67d8e24718a7ab991caa6798563e53ae343cede
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d67d8e24718a7ab991caa6798563e53ae343cede
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Wed Sep 12 12:59:49 2012 +0200
radeonsi: Fix calculation of number of records in buffer resource.
The value was too small by 1 in some cases (non-first of several vertex
elements interleaved in a single buffer).
Fixes intermittent incorrect geometry in many apps, e.g. piglit
spec/EXT_texture_snorm/fbo-generatemipmap-formats.
Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
---
src/gallium/drivers/radeonsi/si_state_draw.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index c71ad43..0cb8b71 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -455,7 +455,7 @@ static void si_vertex_buffer_update(struct r600_context *rctx)
si_pm4_sh_data_add(pm4, va & 0xFFFFFFFF);
si_pm4_sh_data_add(pm4, (S_008F04_BASE_ADDRESS_HI(va >> 32) |
S_008F04_STRIDE(vb->stride)));
- si_pm4_sh_data_add(pm4, (vb->buffer->width0 - offset) /
+ si_pm4_sh_data_add(pm4, (vb->buffer->width0 - vb->buffer_offset) /
MAX2(vb->stride, 1));
si_pm4_sh_data_add(pm4, rctx->vertex_elements->rsrc_word3[i]);
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