Mesa (master): radeon/llvm: Match AMDGPUfract on SI.
Michel Dänzer
daenzer at kemper.freedesktop.org
Mon Sep 17 16:30:16 UTC 2012
Module: Mesa
Branch: master
Commit: 97d3d25e1ce137557ebac82410e57219f92c0191
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97d3d25e1ce137557ebac82410e57219f92c0191
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Thu Sep 6 18:14:22 2012 +0200
radeon/llvm: Match AMDGPUfract on SI.
Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
---
src/gallium/drivers/radeon/SIInstructions.td | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td
index 4b76dad..b221d6d 100644
--- a/src/gallium/drivers/radeon/SIInstructions.td
+++ b/src/gallium/drivers/radeon/SIInstructions.td
@@ -524,7 +524,9 @@ defm V_MOV_FED_B32 : VOP1_32 <0x00000009, "V_MOV_FED_B32", []>;
//defm V_CVT_F32_UBYTE3 : VOP1_32 <0x00000014, "V_CVT_F32_UBYTE3", []>;
//defm V_CVT_U32_F64 : VOP1_32 <0x00000015, "V_CVT_U32_F64", []>;
//defm V_CVT_F64_U32 : VOP1_64 <0x00000016, "V_CVT_F64_U32", []>;
-defm V_FRACT_F32 : VOP1_32 <0x00000020, "V_FRACT_F32", []>;
+defm V_FRACT_F32 : VOP1_32 <0x00000020, "V_FRACT_F32",
+ [(set VReg_32:$dst, (AMDGPUfract AllReg_32:$src0))]
+>;
defm V_TRUNC_F32 : VOP1_32 <0x00000021, "V_TRUNC_F32", []>;
defm V_CEIL_F32 : VOP1_32 <0x00000022, "V_CEIL_F32", []>;
defm V_RNDNE_F32 : VOP1_32 <0x00000023, "V_RNDNE_F32",
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