Mesa (master): gen7 blorp depth: calculate base surface width/height

[Jordan Justen]

Module: Mesa
Branch: master
Commit: e3a49e1ad3a6e35194c9aab8dccce9ee91f3bef5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3a49e1ad3a6e35194c9aab8dccce9ee91f3bef5

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Tue Jul  9 15:32:42 2013 -0700

gen7 blorp depth: calculate base surface width/height

This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>

---

 src/mesa/drivers/dri/i965/gen7_blorp.cpp |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 9ce1a75..920790a 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -663,6 +663,7 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
    uint32_t draw_y = params->depth.y_offset;
    uint32_t tile_mask_x, tile_mask_y;
    uint8_t mocs = brw->is_haswell ? GEN7_MOCS_L3 : 0;
+   uint32_t surfwidth, surfheight;
    uint32_t surftype;
    unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1);
    unsigned int min_array_element;
@@ -698,6 +699,18 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
 
    lod = params->depth.level - params->depth.mt->first_level;
 
+   if (params->hiz_op != GEN6_HIZ_OP_NONE && lod == 0) {
+      /* HIZ ops for lod 0 may set the width & height a little
+       * larger to allow the fast depth clear to fit the hardware
+       * alignment requirements. (8x4)
+       */
+      surfwidth = params->depth.width;
+      surfheight = params->depth.height;
+   } else {
+      surfwidth = params->depth.mt->physical_width0;
+      surfheight = params->depth.mt->physical_height0;
+   }
+
    /* 3DSTATE_DEPTH_BUFFER */
    {
       uint32_t tile_x = draw_x & tile_mask_x;