Mesa (master): i965: Add #defines for the MI_LOAD_REGISTER_MEM command.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 0f7a15a2479a3fec6e3d96166e3c11ebb0d56eed
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f7a15a2479a3fec6e3d96166e3c11ebb0d56eed

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Aug  1 15:11:40 2013 -0700

i965: Add #defines for the MI_LOAD_REGISTER_MEM command.

This command reads a value from memory and writes it to a register (the
opposite of MI_STORE_REGISTER_MEM).  It's only available on Gen7+.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>

---

 src/mesa/drivers/dri/i965/intel_reg.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_reg.h b/src/mesa/drivers/dri/i965/intel_reg.h
index 4e211de..d732038 100644
--- a/src/mesa/drivers/dri/i965/intel_reg.h
+++ b/src/mesa/drivers/dri/i965/intel_reg.h
@@ -44,6 +44,10 @@
 #define MI_STORE_REGISTER_MEM		(CMD_MI | (0x24 << 23))
 # define MI_STORE_REGISTER_MEM_USE_GGTT		(1 << 22)
 
+/* Load a value from memory into a register.  Only available on Gen7+. */
+#define GEN7_MI_LOAD_REGISTER_MEM	(CMD_MI | (0x29 << 23))
+# define MI_LOAD_REGISTER_MEM_USE_GGTT		(1 << 22)
+
 /** @{
  *
  * PIPE_CONTROL operation, a combination MI_FLUSH and register write with