Mesa (master): nvc0: fixup gk110 and up not being listed in various switch statements

Ben Skeggs darktama at kemper.freedesktop.org
Fri Dec 6 01:28:04 UTC 2013


Module: Mesa
Branch: master
Commit: 92ceb327bad73cfde0b68aafb3921067351617fd
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=92ceb327bad73cfde0b68aafb3921067351617fd

Author: Ben Skeggs <bskeggs at redhat.com>
Date:   Fri Dec  6 09:09:42 2013 +1000

nvc0: fixup gk110 and up not being listed in various switch statements

Signed-off-by: Ben Skeggs <bskeggs at redhat.com>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp |    5 ++++-
 .../drivers/nouveau/codegen/nv50_ir_target.cpp     |    5 +++--
 .../nouveau/codegen/nv50_ir_target_nvc0.cpp        |   12 ++++++++----
 src/gallium/drivers/nouveau/nvc0/nvc0_compute.c    |    2 +-
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c     |   10 +++++++---
 src/gallium/drivers/nouveau/nvc0/nve4_compute.c    |    3 ++-
 .../winsys/nouveau/drm/nouveau_drm_winsys.c        |    3 ++-
 7 files changed, 27 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index d65003c..bbf9838 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -851,6 +851,8 @@ GCRA::coalesce(ArrayList& insns)
    case 0xc0:
    case 0xd0:
    case 0xe0:
+   case 0xf0:
+   case 0x100:
       ret = doCoalesce(insns, JOIN_MASK_UNION);
       break;
    default:
@@ -1952,7 +1954,8 @@ RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
             texConstraintNVC0(tex);
             break;
          case 0xe0:
-         case NVISA_GK110_CHIPSET:
+         case 0xf0:
+         case 0x100:
             texConstraintNVE0(tex);
             break;
          default:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp
index 443acfc..112fca7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp
@@ -134,11 +134,12 @@ extern Target *getTargetNV50(unsigned int chipset);
 
 Target *Target::create(unsigned int chipset)
 {
-   switch (chipset & 0xf0) {
+   switch (chipset & ~0xf) {
    case 0xc0:
    case 0xd0:
    case 0xe0:
-   case NVISA_GK110_CHIPSET:
+   case 0xf0:
+   case 0x100:
       return getTargetNVC0(chipset);
    case 0x50:
    case 0x80:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 47e9c55..1f3932e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -46,12 +46,13 @@ TargetNVC0::TargetNVC0(unsigned int card) : Target(false, card >= 0xe4)
 void
 TargetNVC0::getBuiltinCode(const uint32_t **code, uint32_t *size) const
 {
-   switch (chipset & 0xf0) {
+   switch (chipset & ~0xf) {
    case 0xe0:
       *code = (const uint32_t *)&nve4_builtin_code[0];
       *size = sizeof(nve4_builtin_code);
       break;
    case 0xf0:
+   case 0x100:
       *code = (const uint32_t *)&nvf0_builtin_code[0];
       *size = sizeof(nvf0_builtin_code);
       break;
@@ -67,9 +68,12 @@ TargetNVC0::getBuiltinOffset(int builtin) const
 {
    assert(builtin < NVC0_BUILTIN_COUNT);
 
-   switch (chipset & 0xf0) {
-   case 0xe0: return nve4_builtin_offsets[builtin];
-   case 0xf0: return nvf0_builtin_offsets[builtin];
+   switch (chipset & ~0xf) {
+   case 0xe0:
+      return nve4_builtin_offsets[builtin];
+   case 0xf0:
+   case 0x100:
+      return nvf0_builtin_offsets[builtin];
    default:
       return nvc0_builtin_offsets[builtin];
    }
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
index b49f1ae..ad287a2 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
@@ -35,7 +35,7 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
    int ret;
    int i;
 
-   switch (dev->chipset & 0xf0) {
+   switch (dev->chipset & ~0xf) {
    case 0xc0:
       if (dev->chipset == 0xc8)
          obj_class = NVC8_COMPUTE_CLASS;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 62ab2a2..2c3a697 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -478,7 +478,7 @@ nvc0_screen_init_compute(struct nvc0_screen *screen)
 {
    screen->base.base.get_compute_param = nvc0_screen_get_compute_param;
 
-   switch (screen->base.device->chipset & 0xf0) {
+   switch (screen->base.device->chipset & ~0xf) {
    case 0xc0:
    case 0xd0:
       /* Using COMPUTE has weird effects on 3D state, we need to
@@ -489,6 +489,7 @@ nvc0_screen_init_compute(struct nvc0_screen *screen)
       return 0;
    case 0xe0:
    case 0xf0:
+   case 0x100:
       return nve4_screen_compute_setup(screen, screen->base.pushbuf);
    default:
       return -1;
@@ -550,6 +551,7 @@ nvc0_screen_create(struct nouveau_device *dev)
    case 0xd0:
    case 0xe0:
    case 0xf0:
+   case 0x100:
       break;
    default:
       return NULL;
@@ -597,7 +599,8 @@ nvc0_screen_create(struct nouveau_device *dev)
    screen->base.fence.emit = nvc0_screen_fence_emit;
    screen->base.fence.update = nvc0_screen_fence_update;
 
-   switch (dev->chipset & 0xf0) {
+   switch (dev->chipset & ~0xf) {
+   case 0x100:
    case 0xf0:
       obj_class = NVF0_P2MF_CLASS;
       break;
@@ -644,7 +647,8 @@ nvc0_screen_create(struct nouveau_device *dev)
    PUSH_DATAh(push, screen->fence.bo->offset + 16);
    PUSH_DATA (push, screen->fence.bo->offset + 16);
 
-   switch (dev->chipset & 0xf0) {
+   switch (dev->chipset & ~0xf) {
+   case 0x100:
    case 0xf0:
       obj_class = NVF0_3D_CLASS;
       break;
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index 06c914f..f243316 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -43,7 +43,8 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
    int ret;
    uint32_t obj_class;
 
-   switch (dev->chipset & 0xf0) {
+   switch (dev->chipset & ~0xf) {
+   case 0x100:
    case 0xf0:
       obj_class = NVF0_COMPUTE_CLASS; /* GK110 */
       break;
diff --git a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
index 7e88eae..e4f27f6 100644
--- a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
+++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
@@ -20,7 +20,7 @@ nouveau_drm_screen_create(int fd)
 	if (ret)
 		return NULL;
 
-	switch (dev->chipset & 0xf0) {
+	switch (dev->chipset & ~0xf) {
 	case 0x30:
 	case 0x40:
 	case 0x60:
@@ -36,6 +36,7 @@ nouveau_drm_screen_create(int fd)
 	case 0xd0:
 	case 0xe0:
 	case 0xf0:
+	case 0x100:
 		init = nvc0_screen_create;
 		break;
 	default:




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