Mesa (9.1): radeonsi: Fix blending using destination alpha factor but non-alpha destination

[Michel Dänzer]

Module: Mesa
Branch: 9.1
Commit: 0c3b96a6c69861ecf25debb27aeed17302693094
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c3b96a6c69861ecf25debb27aeed17302693094

Author: Michel Dänzer <michel.daenzer at amd.com>
Date:   Mon Feb 18 11:29:18 2013 +0100

radeonsi: Fix blending using destination alpha factor but non-alpha destination

11 more little piglits.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Marek Olšák <maraeo at gmail.com>
(cherry picked from commit 95bced59293bc3dffad955b714c142455aa05aa8)

---

 src/gallium/drivers/radeonsi/si_state.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 072d8b1..2d11a97 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1583,7 +1583,7 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4,
 	struct r600_surface *surf;
 	unsigned level = state->cbufs[cb]->u.tex.level;
 	unsigned pitch, slice;
-	unsigned color_info;
+	unsigned color_info, color_attrib;
 	unsigned tile_mode_index;
 	unsigned format, swap, ntype, endian;
 	uint64_t offset;
@@ -1671,6 +1671,9 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4,
 		S_028C70_NUMBER_TYPE(ntype) |
 		S_028C70_ENDIAN(endian);
 
+	color_attrib = S_028C74_TILE_MODE_INDEX(tile_mode_index) |
+		S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == UTIL_FORMAT_SWIZZLE_1);
+
 	offset += r600_resource_va(rctx->context.screen, state->cbufs[cb]->texture);
 	offset >>= 8;
 
@@ -1688,8 +1691,7 @@ static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4,
 			       S_028C6C_SLICE_MAX(state->cbufs[cb]->u.tex.last_layer));
 	}
 	si_pm4_set_reg(pm4, R_028C70_CB_COLOR0_INFO + cb * 0x3C, color_info);
-	si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C,
-		       S_028C74_TILE_MODE_INDEX(tile_mode_index));
+	si_pm4_set_reg(pm4, R_028C74_CB_COLOR0_ATTRIB + cb * 0x3C, color_attrib);
 
 	/* Determine pixel shader export format */
 	max_comp_size = si_colorformat_max_comp_size(format);