Mesa (master): i965/vs: Do headerless texturing for texelFetchOffset().

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: fce9e5d41bb1d80885d430d0484e9bd46d8ab936
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fce9e5d41bb1d80885d430d0484e9bd46d8ab936

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Jan 21 21:24:34 2013 -0800

i965/vs: Do headerless texturing for texelFetchOffset().

For texelFetchOffset(), we just add the texel offsets to the coordinate
rather than using the message header's offset fields.  So we don't
actually need a header on Gen5+.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ebf8990..d9ff869 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1999,8 +1999,10 @@ vec4_visitor::visit(ir_texture *ir)
       assert(!"TXB is not valid for vertex shaders.");
    }
 
+   bool use_texture_offset = ir->offset != NULL && ir->op != ir_txf;
+
    /* Texel offsets go in the message header; Gen4 also requires headers. */
-   inst->header_present = ir->offset || intel->gen < 5;
+   inst->header_present = use_texture_offset || intel->gen < 5;
    inst->base_mrf = 2;
    inst->mlen = inst->header_present + 1; /* always at least one */
    inst->sampler = sampler;
@@ -2008,7 +2010,7 @@ vec4_visitor::visit(ir_texture *ir)
    inst->dst.writemask = WRITEMASK_XYZW;
    inst->shadow_compare = ir->shadow_comparitor != NULL;
 
-   if (ir->offset != NULL && ir->op != ir_txf)
+   if (use_texture_offset)
       inst->texture_offset = brw_texture_offset(ir->offset->as_constant());
 
    /* MRF for the first parameter */