Mesa (gles3): 21 new commits

Fri Jan 25 05:37:51 UTC 2013

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f1773a62a4d09a2208c838dde785ca9392c44b9
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 9 11:46:42 2013 -0800

    i965/fs/gen7: Emit code for GLSL 3.00 pack/unpack operations (v4)
    
    v2: Remove lewd comment. [for idr]
    v3: - Optimize away tmp register for packHalf2x16. [for anholt, paul]
        - Improve comments. [for anholt, paul]
        - Reduce near-duplicate code by removing vec4_visitor emit_pack/unpack
          methods. [for chadv]
    v4: Factor our UD/W register conversion into helper function. [for anholt]
    
    Reviewed-by: Eric Anholt <eric at anholt.net>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v2)
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cb6ab09c6289d1c5e2396a3600b61521d438c17
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 9 11:44:31 2013 -0800

    i965/vs/gen7: Emit code for GLSL ES 3.00 pack/unpack operations (v3)
    
    FIXME: This patch emits VS code that violates documented hardware
    restrictions and then relies on undocumented behavior that results from
    that violation.  This patch passes all tests, but should be fixed ASAP to
    conform to the hardware documentation.
    
    v2: Explain undocumented hardware behavior. Improve comments.
    v3: Use ALU1 helper methods F32TO16() and F16TO32(). [for anholt]
    
    Reviewed-by: Eric Anholt <eric at anholt.net>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v1)
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd22e3b2c9f463234c495696f1c89c83968f6c17
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 9 11:40:29 2013 -0800

    i965: Quote the PRM on a HorzStride subtlety
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4bf5b61462cd20881b104761379295e55733c6c
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 9 11:35:47 2013 -0800

    i965: Add opcodes for F32TO16 and F16TO32
    
    The GLSL ES 3.00 operations packHalf2x16 and unpackHalf2x16 will emit
    these opcodes.
    
    - Define the opcodes BRW_OPCODE_{F32TO16,F16TO32}.
    - Add the opcodes to the brw_disasm table.
    - Define convenience functions brw_{F32TO16,F16TO32}.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Acked-by: Paul Berry <stereotype441 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad8f1de875514b05a88772fdf6bbd7a92de6716f
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Fri Nov 30 16:49:21 2012 -0800

    i965: Lower the GLSL ES 3.00 pack/unpack operations (v2)
    
    On gen < 7, we fully lower all operations to arithmetic and bitwise
    operations.
    
    On gen >= 7, we fully lower the Snorm2x16 and Unorm2x16 operations, and
    partially lower the Half2x16 operations.
    
    v2:
      - Comment that scalarization is needed only for SOA code [for idr].
      - Replace switch-statement with if-statement [for idr].
      - Remove misplaced hunk from previous patch [found by idr].
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Matt Tuner <mattst88 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6ddfb8cb17ea12fda1aab6b7e24687363051663
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Mon Nov 19 15:15:32 2012 -0800

    glsl: Add lowering pass for GLSL ES 3.00 pack/unpack operations (v4)
    
    Lower them to arithmetic and bit manipulation expressions.
    
    v2: Rewrite using ir_builder [for idr].
    v3: Comment typos. [for mattst88]
    v4: Fix arithmetic error in comments.
        Factor out a shift instruction.
        Don't heap allocate factory.instructions.
        [for paul]
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v2)
    Reviewed-by: Matt Tuner <mattst88 at gmail.com> (v3)
    Reviewed-by: Paul Berry <stereotype441 at gmail.com> (v4)
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=67137dd37e3d6708c627b8449779a8766eb417c8
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Tue Jan 15 12:16:12 2013 -0800

    glsl: Fix type-deduction for and/or/xor expressions
    
    In ir_expression's constructor, the cases for {bit,logic}_{and,or,xor}
    failed to handle the case when both operands were vectors.
    
    Note: This is a candidate for the stable branches.
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aff6360e8cb83e2b958af743fbbe76ea8e09aea4
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Tue Jan 15 12:11:37 2013 -0800

    glsl: Reformat and/or/xor cases in ir_expression ctor
    
    Replace tabs with spaces. According to docs/devinfo.html, Mesa's
    indetation style is:
      indent -br -i3 -npcs --no-tabs infile.c -o outfile.c
    
    This patch prevents whitespace weirdness in the next patch.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc4ef3001a16ce983f415eb9c9208e22a7576e45
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Fri Jan 11 15:53:11 2013 -0800

    glsl/ir_builder: Add helpers for making if-statements
    
    Add two overloaded variants of
        ir_if *if_tree()
    
    The new functions allow one to chain together if-trees within a single C++
    expression that resembles a real if-statement.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=97dc7fe6a3bea5d4d029985d1bd53220aef357ab
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Fri Jan 11 14:54:28 2013 -0800

    glsl/ir_builder: Add `enum writemask`
    
    Using this enum improves the readibility of calls to assign(), whose third
    argument is a writemask.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f23de4cdf256c80c8209a89316cf39ce8b697bff
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Fri Jan 11 15:46:24 2013 -0800

    glsl/ir_factory: Add helper method for making an ir_constant
    
    Add method ir_factory::constant.  This little method constructs an
    ir_constant using the factory's mem_ctx.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d672aa33969a9b00fde8038e5c27da308fd3f35
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Fri Jan 11 09:53:21 2013 -0800

    glsl/ir_builder: Add more helpers for constructing expressions
    
    Add the following functions, each of which construct the similarly named
    ir expression:
        div, round_even, clamp
    
        equal, less, greater, lequal, gequal
    
        logic_not, logic_and, logic_or
    
        bit_not, bit_or, bit_and, lshift, rshift
    
        f2i, i2f, f2u, u2f, i2u, u2i
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c41a5a368ca3e448c876502ace5a1f07cad5973f
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Tue Jan 15 17:29:21 2013 -0800

    glsl/ir_factory: Initialize members to NULL in constructor
    
    This eliminates unexpected behavior due to unitialized values.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=16e27c998651fe139d3de2e6219d79a208c1acfa
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Mon Nov 19 11:14:24 2012 -0800

    glsl: Evaluate constant GLSL ES 3.00 pack/unpack expressions (v3)
    
    That is, evaluate constant expressions of the following functions:
      packSnorm2x16  unpackSnorm2x16
      packUnorm2x16  unpackUnorm2x16
      packHalf2x16   unpackHalf2x16
    
    v2: Reuse _mesa_pack_float_to_half and its inverse to evaluate
        pack/unpackHalf2x16. [for idr]
    v3: Whitespace fixes. [for mattst88]
        Don't cast neg floats directly to uint16; use an intermediate cast to
        int16. [for paul]
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v2)
    Reviewed-by: Paul Berry <stereotype441 at gmail.com>
    Reviewed-by: Matt Tuner <mattst88 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2178abb76906676e05da9ee8f10aa9a171b68c8
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 16 19:58:42 2013 -0800

    mesa: Remove rounding bias in _mesa_float_to_half()
    
    Not all float32 values can be exactly represented as a float16.
    _mesa_float_to_half() rounded such intermediate float32 values to zero by
    truncating unrepresentable bits in the mantissa.
    
    This patch improves _mesa_float_to_half() by rounding intermediate float32
    values to the nearest float16; when the float32 is exactly between two
    float16 values we round to the one with an even mantissa. This behavior is
    preferred over the old behavior because:
      - It has reduced bias relative to the old behavior.
    
      - It reproduces the behavior of real hardware: opcode F32TO16 in
        Intel's GPU ISA.
    
      - By reproducing the behavior of the GPU (at least on Intel hardware),
        compile-time evaluation of constant packHalf2x16 GLSL expressions will
        result in the same value as if the expression were executed on the GPU.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Paul Berry <stereotype441 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=54f7f7044cd4bc8a34629eca429b593ef31097bb
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 16 19:49:40 2013 -0800

    mesa,glsl: Move round_to_even() from glsl to mesa/main (v2)
    
    Move round_to_even's definition to mesa/main so that _mesa_float_to_half()
    can use it in order to eliminate rounding bias.
    
    In additon to moving the fuction definition, prefix its name with "_mesa",
    just as all other functions in mesa/main are prefixed.
    
    v2: Fix Android build.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=96a48a60447a3b4d91707b585f30bd44f91cb037
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 16 12:56:34 2013 -0800

    glsl/standalone_scaffolding: Add stub for _mesa_warning()
    
    A subsequent patch will add mesa/main/imports.c as a dependency to the
    compiler, which in turn requires that _mesa_warning() be defined.
    
    The real definition of _mesa_warning() is in mesa/main/errors.c, but to
    pull that file into the standalone scaffolding would require transitively
    pulling in the dispatch tables.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Acked-by: Paul Berry <stereotype441 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d48a0d6cb1511508c6befabd79a9a78f28e8476
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Mon Nov 19 10:48:25 2012 -0800

    glsl: Extend ir_expression_operation for GLSL 3.00 pack/unpack functions (v2)
    
    For each function {pack,unpack}{Snorm,Unorm,Half}2x16, add a corresponding
    opcode to enum ir_expression_operation.  Validate the new opcodes in
    ir_validate.cpp.
    
    Also, add opcodes for scalarized variants of the Half2x16 functions.  (The
    code generator for the i965 fragment shader requires that all vector
    operations be scalarized.  A lowering pass, to be added later, will
    scalarize the Half2x16 functions).
    
    v2: Fix assertion message in ir_to_mesa [for idr].
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Matt Tuner <mattst88 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=250c9f675766f1bff47a475c8b4e9d8a5e5303e8
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Tue Jan 8 16:13:18 2013 -0800

    glsl: Add IR lisp for GLSL ES 3.00 pack/unpack functions
    
    For each of the following functions, add a declaration to
    builtins/profiles/300es.glsl and create new file
    builtins/ir/${funcname}.ir:
    
      packSnorm2x16  unpackSnorm2x16
      packUnorm2x16  unpackUnorm2x16
      packHalf2x16   unpackHalf2x16
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Matt Tuner <mattst88 at gmail.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f060330f157fb1f55b80cb4e50646c08c85027f9
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Tue Jan 8 08:26:34 2013 -0800

    glsl: Fix typo in comment
    
    s/num_operands()/get_num_operands()/
    
    Discovered because Eclipse failed to resolve the false reference.
    
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8575c939e350c45825924c7b407d4db68c344c08
Author: Chad Versace <chad.versace at linux.intel.com>
Date:   Wed Jan 23 11:17:51 2013 -0800

    i965/disasm: Fix horizontal stride of dest registers
    
    The bug: The printed horizontal stride was the numerical value of the
      BRW_HORIZONTAL_$N enum.
    The fix: Translate the enum before printing.
    
    Note: This is a candidate for the stable releases.
    Reviewed-by: Eric Anholt <eric at anholt.net>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>