Mesa (master): i965: Change fragment input related bitfields to 64-bit.
Paul Berry
stereotype441 at kemper.freedesktop.org
Fri Mar 15 16:36:29 UTC 2013
Module: Mesa
Branch: master
Commit: 6bec74bfd98e2f9c090c550c18c02f71ea80d04e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6bec74bfd98e2f9c090c550c18c02f71ea80d04e
Author: Paul Berry <stereotype441 at gmail.com>
Date: Sun Feb 24 10:53:35 2013 -0800
i965: Change fragment input related bitfields to 64-bit.
This patch updates the bitfields brw_context::wm.input_size_masks,
tracker::size_masks, and brw_wm_prog_key::proj_attrib_mask, all of
which are indexed by gl_frag_attrib, from 32-bit to 64-bit.
This paves the way for supporting geometry shaders, and for merging
the gl_frag_attrib and gl_vert_result enums. The combination of these
two will require at least 55 bits in the bitfields.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Tested-by: Brian Paul <brianp at vmware.com>
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 7 ++++---
src/mesa/drivers/dri/i965/brw_vs_constval.c | 18 +++++++++---------
src/mesa/drivers/dri/i965/brw_wm.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm.h | 2 +-
5 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index d042dd6..d80332c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -986,7 +986,7 @@ struct brw_context
/** Input sizes, calculated from active vertex program.
* One bit per fragment program input attribute.
*/
- GLbitfield input_size_masks[4];
+ GLbitfield64 input_size_masks[4];
/** offsets in the batch to sampler default colors (texture border color)
*/
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 8476bb5..def246c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1044,7 +1044,8 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
*/
if (location >= FRAG_ATTRIB_TEX0 &&
location <= FRAG_ATTRIB_TEX7 &&
- k == 3 && !(c->key.proj_attrib_mask & (1 << location))) {
+ k == 3 && !(c->key.proj_attrib_mask
+ & BITFIELD64_BIT(location))) {
emit(BRW_OPCODE_MOV, attr, fs_reg(1.0f));
} else {
struct brw_reg interp = interp_reg(location, k);
@@ -2987,7 +2988,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
}
if (prog->Name != 0)
- key.proj_attrib_mask = 0xffffffff;
+ key.proj_attrib_mask = ~(GLbitfield64) 0;
if (intel->gen < 6)
key.vp_outputs_written |= BITFIELD64_BIT(FRAG_ATTRIB_WPOS);
@@ -2997,7 +2998,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
continue;
if (prog->Name == 0)
- key.proj_attrib_mask |= 1 << i;
+ key.proj_attrib_mask |= BITFIELD64_BIT(i);
if (intel->gen < 6) {
int vp_index = _mesa_vert_result_to_frag_attrib((gl_vert_result) i);
diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c
index 48635c5..f6ac256 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_constval.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c
@@ -40,7 +40,7 @@
struct tracker {
bool twoside;
GLubyte active[PROGRAM_OUTPUT+1][MAX_PROGRAM_TEMPS];
- GLbitfield size_masks[4]; /**< one bit per fragment program input attrib */
+ GLbitfield64 size_masks[4]; /**< one bit per fragment program input attrib */
};
@@ -151,10 +151,10 @@ static void calc_sizes( struct tracker *t )
continue;
switch (get_output_size(t, vertRes)) {
- case 4: t->size_masks[4-1] |= 1 << fragAttrib;
- case 3: t->size_masks[3-1] |= 1 << fragAttrib;
- case 2: t->size_masks[2-1] |= 1 << fragAttrib;
- case 1: t->size_masks[1-1] |= 1 << fragAttrib;
+ case 4: t->size_masks[4-1] |= BITFIELD64_BIT(fragAttrib);
+ case 3: t->size_masks[3-1] |= BITFIELD64_BIT(fragAttrib);
+ case 2: t->size_masks[2-1] |= BITFIELD64_BIT(fragAttrib);
+ case 1: t->size_masks[1-1] |= BITFIELD64_BIT(fragAttrib);
break;
}
}
@@ -200,10 +200,10 @@ static void calc_wm_input_sizes( struct brw_context *brw )
* that correct code is generated.
*/
if (vp->program.Base.NumInstructions == 0) {
- brw->wm.input_size_masks[0] = ~0;
- brw->wm.input_size_masks[1] = ~0;
- brw->wm.input_size_masks[2] = ~0;
- brw->wm.input_size_masks[3] = ~0;
+ brw->wm.input_size_masks[0] = ~(GLbitfield64) 0;
+ brw->wm.input_size_masks[1] = ~(GLbitfield64) 0;
+ brw->wm.input_size_masks[2] = ~(GLbitfield64) 0;
+ brw->wm.input_size_masks[3] = ~(GLbitfield64) 0;
return;
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 77bede0..e9ef5c7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -428,7 +428,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
* useful for programs using shaders.
*/
if (ctx->Shader.CurrentFragmentProgram)
- key->proj_attrib_mask = 0xffffffff;
+ key->proj_attrib_mask = ~(GLbitfield64) 0;
else
key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index a4ac3f1..8eb71de 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -67,7 +67,7 @@ struct brw_wm_prog_key {
GLuint clamp_fragment_color:1;
GLuint line_aa:2;
- GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
+ GLbitfield64 proj_attrib_mask; /**< one bit per fragment program attribute */
GLushort drawable_height;
GLbitfield64 vp_outputs_written;
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