Mesa (master): radeonsi: try to fix IA_MULTI_VGT_PARAM programming

[Marek Olšák]

Module: Mesa
Branch: master
Commit: e5f0080d912d9231773a087c9f3e3a55136c467a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5f0080d912d9231773a087c9f3e3a55136c467a

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Oct 30 00:36:58 2013 +0100

radeonsi: try to fix IA_MULTI_VGT_PARAM programming

This doesn't make any difference on Bonaire, but it might help on Hawaii.

---

 src/gallium/drivers/radeonsi/si_state.c      |    1 +
 src/gallium/drivers/radeonsi/si_state.h      |    1 +
 src/gallium/drivers/radeonsi/si_state_draw.c |    8 ++++++--
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 97710f0..d23b28a 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -525,6 +525,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
 	rs->two_side = state->light_twoside;
 	rs->multisample_enable = state->multisample;
 	rs->clip_plane_enable = state->clip_plane_enable;
+	rs->line_stipple_enable = state->line_stipple_enable;
 
 	polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
 				state->fill_back != PIPE_POLYGON_MODE_FILL);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 6dbf880..afd0388 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -46,6 +46,7 @@ struct si_state_rasterizer {
 	bool			flatshade;
 	bool			two_side;
 	bool			multisample_enable;
+	bool			line_stipple_enable;
 	unsigned		sprite_coord_enable;
 	unsigned		pa_sc_line_stipple;
 	unsigned		pa_su_sc_mode_cntl;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index d20658e..1467bb6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -320,14 +320,18 @@ static bool si_update_draw_info_state(struct r600_context *rctx,
 	}
 
 	if (rctx->b.chip_class >= CIK) {
+		struct si_state_rasterizer *rs = rctx->queued.named.rasterizer;
 		bool wd_switch_on_eop = prim == V_008958_DI_PT_POLYGON ||
 					prim == V_008958_DI_PT_LINELOOP ||
 					prim == V_008958_DI_PT_TRIFAN ||
 					prim == V_008958_DI_PT_TRISTRIP_ADJ ||
-					info->primitive_restart;
+					info->primitive_restart ||
+					(rs ? rs->line_stipple_enable : false);
+		/* If the WD switch is false, the IA switch must be false too. */
+		bool ia_switch_on_eop = wd_switch_on_eop;
 
 		si_pm4_set_reg(pm4, R_028AA8_IA_MULTI_VGT_PARAM,
-			       S_028AA8_SWITCH_ON_EOP(1) |
+			       S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
 			       S_028AA8_PARTIAL_VS_WAVE_ON(1) |
 			       S_028AA8_PRIMGROUP_SIZE(63) |
 			       S_028AA8_WD_SWITCH_ON_EOP(wd_switch_on_eop));