Mesa (master): i965: Gen4-5: Don't enable hardware alpha test with MRT

[Chris Forbes]

Module: Mesa
Branch: master
Commit: dbcd633040939565f91eedac6ea313503ac9f0a5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbcd633040939565f91eedac6ea313503ac9f0a5

Author: Chris Forbes <chrisf at ijw.co.nz>
Date:   Sun Oct 27 12:09:51 2013 +1300

i965: Gen4-5: Don't enable hardware alpha test with MRT

We have to do this in the shader instead, since these gens lack an
independent RT0 alpha value in their render target write messages.

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_cc.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index 6f85f63..53466e7 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -187,7 +187,8 @@ static void upload_cc_unit(struct brw_context *brw)
 				eqA != eqRGB);
    }
 
-   if (ctx->Color.AlphaEnabled) {
+   /* _NEW_BUFFERS */
+   if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) {
       cc->cc3.alpha_test = 1;
       cc->cc3.alpha_test_func =
 	 intel_translate_compare_func(ctx->Color.AlphaFunc);