Mesa (master): vc4: Make some helpers for setting condition codes in instructions.
Eric Anholt
anholt at kemper.freedesktop.org
Fri Aug 22 17:19:15 UTC 2014
Module: Mesa
Branch: master
Commit: 0f894b2795b7a1a33e0d8233eeb2e8eba9c8dcc0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f894b2795b7a1a33e0d8233eeb2e8eba9c8dcc0
Author: Eric Anholt <eric at anholt.net>
Date: Thu Aug 21 13:17:58 2014 -0700
vc4: Make some helpers for setting condition codes in instructions.
---
src/gallium/drivers/vc4/vc4_qpu.c | 14 ++++++++++++++
src/gallium/drivers/vc4/vc4_qpu.h | 2 ++
src/gallium/drivers/vc4/vc4_qpu_emit.c | 26 +++++++++++---------------
3 files changed, 27 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_qpu.c b/src/gallium/drivers/vc4/vc4_qpu.c
index de07f72..d74dee5 100644
--- a/src/gallium/drivers/vc4/vc4_qpu.c
+++ b/src/gallium/drivers/vc4/vc4_qpu.c
@@ -216,3 +216,17 @@ qpu_set_sig(uint64_t inst, uint32_t sig)
return (inst & ~QPU_SIG_MASK) | QPU_SET_FIELD(sig, QPU_SIG);
}
+uint64_t
+qpu_set_cond_add(uint64_t inst, uint32_t sig)
+{
+ assert(QPU_GET_FIELD(inst, QPU_COND_ADD) == QPU_COND_ALWAYS);
+ return (inst & ~QPU_COND_ADD_MASK) | QPU_SET_FIELD(sig, QPU_COND_ADD);
+}
+
+uint64_t
+qpu_set_cond_mul(uint64_t inst, uint32_t sig)
+{
+ assert(QPU_GET_FIELD(inst, QPU_COND_MUL) == QPU_COND_ALWAYS);
+ return (inst & ~QPU_COND_MUL_MASK) | QPU_SET_FIELD(sig, QPU_COND_MUL);
+}
+
diff --git a/src/gallium/drivers/vc4/vc4_qpu.h b/src/gallium/drivers/vc4/vc4_qpu.h
index 45aac0e..15a33fc 100644
--- a/src/gallium/drivers/vc4/vc4_qpu.h
+++ b/src/gallium/drivers/vc4/vc4_qpu.h
@@ -131,6 +131,8 @@ uint64_t qpu_m_alu2(enum qpu_op_mul op, struct qpu_reg dst,
uint64_t qpu_inst(uint64_t add, uint64_t mul);
uint64_t qpu_load_imm_ui(struct qpu_reg dst, uint32_t val);
uint64_t qpu_set_sig(uint64_t inst, uint32_t sig);
+uint64_t qpu_set_cond_add(uint64_t inst, uint32_t cond);
+uint64_t qpu_set_cond_mul(uint64_t inst, uint32_t cond);
static inline uint64_t
qpu_load_imm_f(struct qpu_reg dst, float val)
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index 477929c..d777af6 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -379,12 +379,10 @@ vc4_generate_code(struct qcompile *c)
fixup_raddr_conflict(c, src[1], &src[2]);
queue(c, qpu_inst(qpu_a_MOV(dst, src[1]),
qpu_m_MOV(dst, src[2])));
- *last_inst(c) = ((*last_inst(c) & ~(QPU_COND_ADD_MASK |
- QPU_COND_MUL_MASK))
- | QPU_SET_FIELD(QPU_COND_NS,
- QPU_COND_ADD)
- | QPU_SET_FIELD(QPU_COND_NC,
- QPU_COND_MUL));
+ *last_inst(c) = qpu_set_cond_add(*last_inst(c),
+ QPU_COND_NS);
+ *last_inst(c) = qpu_set_cond_mul(*last_inst(c),
+ QPU_COND_NC);
} else {
if (dst.mux == src[1].mux &&
dst.addr == src[1].addr) {
@@ -393,18 +391,16 @@ vc4_generate_code(struct qcompile *c)
queue(c, qpu_inst(qpu_a_MOV(dst, src[2]),
qpu_m_NOP()));
- *last_inst(c) = ((*last_inst(c) & ~(QPU_COND_ADD_MASK))
- | QPU_SET_FIELD(QPU_COND_NC,
- QPU_COND_ADD));
+ *last_inst(c) = qpu_set_cond_add(*last_inst(c),
+ QPU_COND_NC);
} else {
queue(c, qpu_inst(qpu_a_MOV(dst, src[2]),
qpu_m_NOP()));
queue(c, qpu_inst(qpu_a_MOV(dst, src[1]),
qpu_m_NOP()));
- *last_inst(c) = ((*last_inst(c) & ~(QPU_COND_ADD_MASK))
- | QPU_SET_FIELD(QPU_COND_NS,
- QPU_COND_ADD));
+ *last_inst(c) = qpu_set_cond_add(*last_inst(c),
+ QPU_COND_NS);
}
}
break;
@@ -421,9 +417,9 @@ vc4_generate_code(struct qcompile *c)
queue(c, qpu_load_imm_f(dst, 0.0));
queue(c, qpu_load_imm_f(dst, 1.0));
- *last_inst(c) = ((*last_inst(c) & ~QPU_COND_ADD_MASK)
- | QPU_SET_FIELD(compareflags[qinst->op - QOP_SEQ],
- QPU_COND_ADD));
+ *last_inst(c) = qpu_set_cond_add(*last_inst(c),
+ compareflags[qinst->op - QOP_SEQ]);
+
break;
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