Mesa (broadwell): i965: Disable 3DSTATE_WM_HZ_OP fields.

[Kenneth Graunke]

Module: Mesa
Branch: broadwell
Commit: c566ea77d876f9c38cf3ba20560d0a12db19ade9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c566ea77d876f9c38cf3ba20560d0a12db19ade9

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Dec  6 03:07:54 2013 -0800

i965: Disable 3DSTATE_WM_HZ_OP fields.

Eric believes this to be wrong and unnecessary, as the command is
supposed to emit an implicit rectangle primitive.  However, empirically
the pixel pipeline is completely unreliable without it.  So for now, it
stays until someone comes up with a better solution.

We'll need to do better than this when we implement multisampling, HiZ,
or fast clears...but for now, this will do.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Eric Anholt <eric at anholt.net>

---

 src/mesa/drivers/dri/i965/brw_defines.h  |    2 ++
 src/mesa/drivers/dri/i965/gen8_disable.c |    8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 36bbb74..31f9767 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1751,6 +1751,8 @@ enum brw_message_target {
 #define GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE         (1 << 1)
 #define GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE        (1 << 0)
 
+#define _3DSTATE_WM_HZ_OP                       0x7852 /* GEN8+ */
+
 #define _3DSTATE_PS_BLEND                       0x784D /* GEN8+ */
 /* DW1 */
 # define GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE         (1 << 31)
diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c b/src/mesa/drivers/dri/i965/gen8_disable.c
index e1e26c6..276bd2e 100644
--- a/src/mesa/drivers/dri/i965/gen8_disable.c
+++ b/src/mesa/drivers/dri/i965/gen8_disable.c
@@ -29,6 +29,14 @@
 static void
 disable_stages(struct brw_context *brw)
 {
+   BEGIN_BATCH(5);
+   OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+
    /* Disable the HS Unit */
    BEGIN_BATCH(11);
    OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (11 - 2));