Mesa (master): 21 new commits

Kenneth Graunke kwg at kemper.freedesktop.org
Sat Feb 1 01:57:56 UTC 2014


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1cdafe6f78b4e271fd22da2e8d92c2684282e77
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Jan 30 17:50:02 2014 -0800

    i965: Fix math instruction hstride assertions on Broadwell.
    
    In the final revision of my gen8_generator patch, I updated the MATH
    instruction's assertion from (dst.hstride == 1) to check that source and
    destination hstride matched.  Unfortunately, I didn't test this enough,
    and many Piglit tests fail this test.
    
    The documentation indicates that "scalar source is also supported",
    which we believe means <0,1,0> access mode (hstride == 0).  If hstride
    is non-zero, then it must match the destination register.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8878055f5f46726822d03cd3a81e53e5ee50059
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Nov 1 11:41:34 2013 -0700

    i965: Add (disabled) Broadwell PCI IDs.
    
    This puts the PCI IDs in place so it's easy to enable support.  However,
    it doesn't actually enable support since it's very preliminary still,
    and a few crucial pieces (such as BLORP) are still missing.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Acked-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ade766684933ac84e41634429fb693f85353c11
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Dec 6 03:07:54 2013 -0800

    i965: Disable 3DSTATE_WM_HZ_OP fields.
    
    Eric believes this to be wrong and unnecessary, as the command is
    supposed to emit an implicit rectangle primitive.  However, empirically
    the pixel pipeline is completely unreliable without it.  So for now, it
    stays until someone comes up with a better solution.
    
    We'll need to do better than this when we implement multisampling, HiZ,
    or fast clears...but for now, this will do.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Acked-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4c4e0ed64bceca57e19c0a9f53aae77d795aa937
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Nov 4 23:19:55 2013 -0800

    i965: Update GS state for Broadwell.
    
    This is quite similar to the Gen7 code.  The main changes:
     - 48-bit relocations
     - Thread count is specified as U/2-1 instead of U-1.
     - An extra DWord (DW9) with clip planes, URB entry output length/offsets
     - We need to program the "Expected Vertex Count" (VerticesIn)
    
    v2: Set the number of binding table entries so they can be prefetched
        (requested by Eric Anholt).
    v3: Add a WARN_ONCE for a missing workaround.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0d4311072267aa5427eb2cacd820e96f114eba0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Dec 3 15:20:37 2012 -0800

    i965: Update multisampling state for Broadwell.
    
    On previous platforms, 3DSTATE_MULTISAMPLE contained the number of
    samples, pixel location, and the positions of each sample within a pixel
    for each multisampling mode (4x and 8x).  It was also a non-pipelined
    command, presumably since changing the sample positions is fairly
    drastic.
    
    Broadwell improves upon this by splitting the sample positions out into
    a separate non-pipelined state packet, 3DSTATE_SAMPLE_PATTERN.  With
    that removed, 3DSTATE_MULTISAMPLE becomes a pipelined state packet.
    
    Broadwell also supports 2x and 16x multisampling, in addition to the 4x
    and 8x supported by Gen7.  This patch, however, does not implement 2x
    and 16x.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9cd65e3289ecb1df7148d01d453f8804e75c087f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Dec 14 03:58:30 2012 -0800

    i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.
    
    The amount of cut and paste from Gen7 is rather ugly, and should
    probably be cleaned up in the future.  Even the Gen7 code is in need of
    some tidying though; many of the function parameters aren't used on
    platforms that use level/layer rather than tile offsets.  Tidying both
    can be left to a future patch series.  This at least gets things going.
    
    v2: Rebase on Paul's rename of NumLayers -> MaxNumLayers.
    
    v3: Shift QPitch by 2 when storing it in the packet.  Bits 14:0 store
        bits 16:2 of the actual value.  Fixes tests.
    
    v4: Add missing stencil buffer QPitch.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Acked-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2fce1e3c6982ddb53cc60b84af64594c49e9e869
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Dec 5 19:30:26 2012 -0800

    i965: Update BLEND_STATE for Broadwell.
    
    v2: Allow logic ops on all surface types.  The UNORM restriction was
        lifted with Haswell and I simply hadn't noticed.  Also, add missing
        BRW_NEW_STATE_BASE_ADDRESS dirty bit.  Both caught by Eric Anholt.
    
    v3: Fix swapped per-RT DWord pairs.  Eliminates bizarre hacks.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=460e0df3308f896741c884cac427c13a0e187354
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Dec 5 15:34:34 2012 -0800

    i965: Update SF_CLIP_VIEWPORT for Broadwell.
    
    It has additional fields to support clipping to the viewport even if
    guardband clipping is enabled.
    
    v2: Update for viewport array changes.
    v3: No, seriously, update for viewport array changes.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v1]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcbf25969ed0b7154506347efd9e7aaa945a3a16
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Dec 4 16:39:03 2012 -0800

    i965: Rework SURFACE_STATE entries for Broadwell.
    
    v2: Add missing SCS setting in gen8_emit_buffer_surface_state (caught by
        Eric Anholt).
    
    v3: Use stored QPitch rather than recomputing it.
    
    v4: Shift QPitch by 2 when setting it in the packet; bits 14:0 store
        bits 16:2 of the actual value (fixes myriads of cube and array
        texturing tests).  Also, only enable cube face bits for cubemaps
        (matches Chris Forbes' commit on master).  Port to use offset64.
    
    v5: s/gl_format/mesa_format/g
    
    v6: Fix DW5 of renderbuffer state, which neglected to subtract
        irb->mt->first_level.  Use vertical_alignment() rather than
        hardcoding 4.  Use ffs for multisample counts rather than a
        large switch statement (all caught/suggested by Eric).
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=990aaf87c4740e0225db9f4395541938571727cd
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Dec 4 14:45:19 2012 -0800

    i965: Update SOL state for Broadwell.
    
    Unlike on Gen7, we can directly set the offset via the state packet.
    We also -have- to: the kernel SOL reset code won't work anymore.
    
    v2: Fix copy and paste mistake in buffer stride setup; drop stale
        comment (caught by Eric Anholt).  Add a perf_debug for missing
        MOCS setup.
    
    v3: Rebase on Paul Berry's changes to CurrentVertexProgram.
    
    v4: Fix SO Write Offset handling.  We need to set bits 20 and 21 so the
        hardware both loads and saves the offset.  There's also a
        restriction that 3DSTATE_SO_BUFFER can only be programmed once per
        buffer between primitives, so the "reset to zero" code needed
        reworking.  Fixes most of the transform feedback Piglit tests.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v2]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd91ab662d64746ceaddc6de9c5d684ac725799f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Nov 28 21:39:19 2012 -0800

    i965: Update the code that disables unused shader stages for Broadwell.
    
    v2: Also disable 3DSTATE_WM_CHROMAKEY for safety.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v1]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d3c351cfbeb7c948c474213662499d10447ffab
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Nov 1 16:29:33 2013 -0700

    i965: Update 3DSTATE_CLIP for Broadwell.
    
    Broadwell's winding order, polygon fill, and viewport Z test fields have
    moved to DWord 1 of 3DSTATE_RASTER.
    
    v2: Add a perf_debug for a future optimization and improve commit
        message (both suggested by Eric Anholt).
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c0d7dbcb9575bd8126d4d4ef83753664b848d27
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Dec 3 18:28:29 2012 -0800

    i965: Rework vertex uploads for Broadwell.
    
    v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed.
    
    v3: Add WARN_ONCE and perf_debugs requested by Eric Anholt.
    
    v4: Program 3DSTATE_SGVS even in the no-elements case so gl_VertexID
        continues working.  Fix 3DSTATE_VF_INSTANCING to not use an
        element index to access the buffers array.  Some ARB_draw_indirect
        prep work.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=08a471495935665c55f2968e310d6e20193b02f1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Dec 3 13:53:40 2012 -0800

    i965: Update STATE_BASE_ADDRESS for Broadwell.
    
    v2: Fix missing "change" bit on instruction state base address
        (caught by Haihao Xiang).
    
    v3: Add a perf_debug for missing MOCS setup, requested by Eric.
    
    v4: Fix buffer sizes.  The value, specified at bit 12 and up, is
        actually measured in 4k pages.  We need to round up to the
        next multiple of 4k.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v3]
    Reviewed-by: Matt Turner <mattst88 at gmail.com> [v4]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3c6d6f1e151f6a44a76038dccebe4434038dcb1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Nov 29 21:00:27 2012 -0800

    i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.
    
    v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases.
    
    v3: Add missing binding table entry counts.  Don't worry about alpha
        testing or alpha to coverage when setting the "Kill Pixel" bit;
        those are specified in 3DSTATE_PS_BLEND (caught by Eric Anholt).
        Drop unused _NEW_BUFFERS.  Tidy comments.
    
    v4: Rebase on Paul Berry's changes to CurrentFragmentProgram.
    
    v5: Re-enable line stippling.  It doesn't crash or anything.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v3]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=20d9286f71253004a91acbcf4c257e84ee7df077
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Nov 29 01:10:19 2012 -0800

    i965: Rework 3DSTATE_VS for Broadwell.
    
    v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to
        urb_entry_output_offset to closer match the documentation.
    
    v3: Only emit a non-zero constant buffer read length when active.
    
    v4: Add missing binding table counts (caught by Eric).
    
    v5: Rebase on Paul Berry's changes to CurrentVertexProgram.
    
    v6: Drop bogus SBE read length/offset field code.  We were programming
        the wrong values, and our 3DSTATE_SBE code overrides any value we
        put here anyway with the correct one.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v4]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c96686a6cc0f53965b99a55046d1c55a867f93b3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Nov 29 18:43:59 2012 -0800

    i965: Add the new 3DSTATE_PS_BLEND state packet.
    
    v2: Only set GEN8_PS_BLEND_HAS_WRITEABLE_RT if color buffer writes are
        enabled (caught by Eric Anholt).
    
    v3: Set non-blending flags (writeable RT, alpha test, alpha to coverage)
        for integer formats too.  +14 Piglits.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v2]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=17768bb7b428f367e351bf9bfa480bd0d4e57442
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Nov 29 17:52:31 2012 -0800

    i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.
    
    v2: Use stencil->_WriteEnabled instead of setting
        GEN8_WM_DS_STENCIL_BUFFER_WRITE_ENABLE twice (suggested by Eric).
    
    v3: Mask stencil->WriteMask and stencil->ValueMask with 0xff.  The field
        is only 8-bits, so we'd trip the new SET_FIELD assertion when core
        Mesa gave us a value like 0xFFFFFFFF.  The Gen7 code uses structure
        field widths to implicitly do this truncation.  Fixes Piglit tests.
    
    v4: Use uint32_t for dw1/dw2, not uint8_t.  Worst. Typo. Ever.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net> [v2]

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=90fff1354b81ab880f1d2c2945c374ad6d8fe44f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Nov 1 14:37:33 2013 -0700

    i965: Update SF, SBE, and RASTER state for Broadwell.
    
    The attribute override portion of 3DSTATE_SBE was split out into
    3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into
    3DSTATE_RASTER.
    
    v2: Set Force URB Read Offset bit.  Eventually the URB read offset
        should be set in 3DSTATE_VS, but that will require some refactoring.
    
    v3: Rebase on viewport array changes.
    
    v4: Improve comments about URB read length/offset overrides.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4552a22f0425149f9bb5722af46c1c8766ddc8db
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Nov 29 01:50:22 2012 -0800

    i965: Bump generation assertions on workaround flushes.
    
    I haven't investigated whether these are necessary on Broadwell or not,
    but for paranoia's sake, we may as well continue doing them for now.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Chad Versace <chad.versace at linux.intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2184b519cd2cbb7163d4757afb8d8dc193864c4d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Nov 28 21:16:18 2012 -0800

    i965: Duplicate gen7_atoms to gen8_atoms.
    
    It's going to diverge significantly.  Starting out with a copy allows
    future patches to change atoms one by one.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eric Anholt <eric at anholt.net>




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