Mesa (broadwell): 189 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Wed Feb 5 23:39:20 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd55229f3b6bdbd29b805ee272f9a3467a149d97
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:47:10 2014 -0800
i965: Label JIP and UIP in Broadwell shader disassembly.
This makes it obvious which number is which.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1664a79b3b30b99e702bac1a20e087adcf39e383
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:35:50 2014 -0800
i965: Don't disassemble UIP field for Broadwell WHILE instructions.
The WHILE instruction doesn't have UIP. It only has JIP.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6e71898c141f3b1f509cee384d595cfed77ad70
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:32:39 2014 -0800
i965: Don't print source registers for Broadwell flow control.
The bits which normally contain the source register descriptions
actually contain the JIP/UIP jump targets, which we already printed.
Interpreting JIP/UIP as source registers results in some really creepy
looking output, like IF statements with acc14.4<0,1,0>UD sources.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5565f05a1ef773c96e58070a1395613bbb133c92
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 14:45:28 2014 -0800
i965: Program MOCS on everything (Gen8) ... except surface state
really should there
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb9a9026402389904103d0381ba61bc905c5acc2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 13:45:27 2014 -0800
i965/fs: Implement FS_OPCODE_[UN]PACK_HALF_2x16_SPLIT[_XY] opcodes.
I'd neglected to port these to Broadwell. Most of this code is copy
and pasted from Gen7, but instead of using F32TO16/F16TO32, we just
use MOV with HF register types.
Fixes fs-packHalf2x16 and fs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e3c5cfb8c7b162a03272550c8de478258dbd008
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 14:16:27 2014 -0800
i965: Drop bogus F32TO16/F16TO32 instructions on Broadwell - use MOV.
Broadwell removed the F32TO16 and F16TO32 instructions. However, it has
actual support for HF values, so they're actually just MOV.
Fixes vs-packHalf2x16 and vs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=86bf7fcae0007dee592be48665c7eb680ef35bf9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 14:12:51 2014 -0800
i965: Fix Gen8+ disassembly of half float subregister numbers.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bff271c5ffaaa774edf4567930026b76eb195ed
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:56:38 2014 -0800
stash - vp fixes?
doesn't seem to actually fix anything.
oh, this might only be relevant when I turn on the viewport extents test
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34624e110c1497ab81190ca7dea548a32cbeb703
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 14:30:39 2014 -0800
i965: Fix General and Indirect Base Addresses on Broadwell.
I set the "address modify enable" bit in the wrong DWord. The first
DWord is the high 16 bits of the address, while the second is the low
32-bits and enable bit.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80081e916af3f965f4889e2b9ef36797126303c5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 10:45:31 2014 -0800
i965: Drop VECTOR_MASK_ENABLE in Broadwell's 3DSTATE_VS packet.
We never set it on previous generations, but I had to set it in
3DSTATE_PS for correct behavior. For symmetry, I set it in 3DSTATE_VS
as well, but there's no actual need to do so. Piglit works fine either
way. The documentation also remarks that there should never be a need
to program this.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea6173188c95f00dca3d6e2dc2ce0c2fac1a01e4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 30 15:30:19 2014 -0800
i965: Use MOV, not OR for setting URB write channel enables on Gen8+.
On Broadwell, g0.5 contains the "Scratch Space Pointer"; using OR
puts some bits of that into "ignored" sections of our message header.
While this doesn't hurt, it's also not terribly /useful/. Using MOV
is sufficient to set the only interesting bits in this part of the
message header.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=068d3fbb8c8236b1f74a71587206bbc753e6bd62
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 30 22:07:20 2013 -0800
i965: Enable Broadwell support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d64cd335a723a4e1eb63cea15d43c700edf9401e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:06:30 2014 -0800
i965: Add missing sample shading bits to Gen8's 3DSTATE_PS_EXTRA.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=402c26cf477bbee150de9f09282a4c960fc275c1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 20:51:28 2014 -0800
i965: Use the new brw_load_register_mem helper for draw indirect.
This makes it work on Broadwell, too.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d76ad7e31fb8df5c82514b45acc36b176b87c9f2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 20:43:49 2014 -0800
i965: Implement a brw_load_register_mem helper function.
This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64
distinction.
Placing the function in intel_batchbuffer.c is rather arbitrary; there
wasn't really an obvious place for it.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c1479620efd5e2ed0f7f04ba46bd02227b06420
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 16:31:31 2014 -0800
i965/gs: Fix EndPrimitive on Broadwell.
My earlier patch (i965: Reserve space for "Vertex Count" in GS outputs.)
incremented Global Offset for most URB writes to make room for the new
"Vertex Count" field, but failed to shift the URB writes used for
writing control bits.
Confusingly, Global Offset must be incremented by 2 here, rather than 1.
The URB writes we use for actual data are HWord writes, which treat
Global Offset as a 256-bit offset. These are OWord writes, so it's
treated as a 128-bit offset instead.
Cc: Paul Berry <stereotype441 at gmail.com>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c32c2783a0283b608164ff83476a12860d06e993
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Jan 28 22:02:56 2014 -0800
Also emit VF_INSTANCING in the no-elements case.
I can't imagine why this would matter since there's no actual data being
pulled, but...for safety?
Not observed to help anything
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1cc159a93229ae444667464ac0542fef4cfdad7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 26 00:20:21 2014 -0800
i965: Implement a CS stall workaround
According to the latest documentation, any PIPE_CONTROL with the
"Command Streamer Stall" bit set must also have another bit set,
with five different options:
- Render Target Cache Flush
- Depth Cache Flush
- Stall at Pixel Scoreboard
- Post-Sync Operation
- Depth Stall
I chose "Stall at Pixel Scoreboard" since we've used it effectively
in the past, but the choice is fairly arbitrary.
Implementing this in the PIPE_CONTROL emit helpers ensures that the
workaround will always take effect when it ought to.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3dc7b9eb06b6e97dcb21f177b57de464ad34c88
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 11:05:46 2014 -0800
i965/vec4: Support arbitrarily large sampler indices on Broadwell+.
I added support for these on Haswell, but forgot to update the Broadwell
code before landing it. Fixes Piglit's max-samplers test.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=effe833ea962b344b0e4218027a5a5bd7ebf50d7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 10:58:25 2014 -0800
i965/fs: Support arbitrarily large sampler indices on Broadwell+.
I added support for these on Haswell, but forgot to update the Broadwell
code before landing it. Partially fixes Piglit's max-samplers test.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=99e8650fb85bd32d7e1945bef3effba18cf6745d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 10:55:16 2014 -0800
i965/fs: Fix Broadwell texture header setup to be uncompressed.
MOV_RAW disables masking, but doesn't force the instruction to be
uncompressed. That needs to be done by hand.
Fixes textureGather and texture offset tests.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=89f61281022348b778c2d352daa9c87d4ea0d18e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 11:13:48 2014 -0800
i965: Fix INTEL_DEBUG=vs for fixed-function/ARB programs.
Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs
has caused a NULL pointer dereference for fixed-function/ARB programs.
In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the
gl_shader_program. This is different than the FS visitor.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16215a9723803f535fd3f49b9988b771d4587d65
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Feb 5 07:52:48 2014 +1000
docs/GL3.txt: update r600 status
This updates the r600 driver status to 3.3 being fully supported.
Signed-off-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=79ea0f4506995c010320d56cd9dbfbefa34ab6f2
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Jan 30 04:19:57 2014 +0000
r600g: add support for geom shaders to r600/r700 chipsets (v2)
This is my first attempt at enabling r600/r700 geometry shaders,
the basic tests pass on both my rv770 and my rv635,
It requires this kernel patch:
http://www.spinics.net/lists/dri-devel/msg52745.html
v2: address Alex comments.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccea799ee3fbefaf6d97c21bbf3e38f857f91d87
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Jan 29 21:48:09 2014 +0000
r600g: enable GLSL 3.30 on evergreen GPUs
This throws the switch to enable GL 3.3 and GLSL 330.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6cfc54db059310c41d139c4d01929928d031b55
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Feb 4 10:48:42 2014 +1000
r600g: properly propogate clip dist write value
This moves the value from the GS shader to the copy shader so the registers
are setup correctly.
fixes tests/spec/glsl-1.50/execution/geometry/clip-distance-out-values.shader_test
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b209afb153c39be1693879ce9666ca18f12b6a37
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Feb 3 15:31:26 2014 +1000
r600g: calculate a better value for array_size (v2)
attempt to calculate a better value for array size to avoid breaking apps.
v2: use 0xfff like streamout, suggested by Grigori
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce9e939144aa2c711718dce42477858e13f6b264
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Jan 31 03:35:51 2014 +0000
r600g: fix CAYMAN geometry shader support
cayman has a different end of program bit, so do that properly.
fixes hangs with geom shader tests on cayman.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ec5e883f20a7ed88c23a98c4be8d4a4ea06e81e
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Jan 29 00:17:15 2014 +0000
r600g: fix up shader out misc stuff for copy shader
set the correct values so the misc out register is setup correctly
for the copy shader.
This also updates the state for the gs copy shader so the hw
gets programmed correctly.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7863611de3305208effe96fbbef5eaf49b60c904
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Jan 28 23:15:29 2014 +0000
r600g: port the layered surface rendering patch from radeonsi
This just makes r600 and evergreen do what the radeonsi codepaths do
for layered rendering. This makes the 2d amd_vertex_shader_layer test
pass on evergreen.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f89394be986843a65150ae9bef761b73e58fd1ba
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Jan 28 13:04:00 2014 +1000
r600g: initial VS output layer support
This just adds support for emitting the proper value in the VS out misc.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5191937352f50e214073b1fcdf6018df2ea431a6
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Jan 28 12:06:49 2014 +1000
r600g: setup const texture buffers for geom shaders
This just enables the workarounds we have for vertex/pixel shaders
for geom shaders as well.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=afce47fb0b489c248ebeb3660c30660ae900b967
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Jan 24 17:14:26 2014 +1000
r600g: calculate correct cut value
This selects the cut value depending on the shader selected.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d79d5da40fcf0c7233dec4d9ac4ce66b9942147
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Jan 24 14:46:37 2014 +1000
r600g: fix dynamic_input_array_index.shader_test
This follows what fglrx does, it unpacks the input we are
going to indirect into a bunch of registers and indirects
inside them.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e12147e9f608b8117e653152317c6c64ea004b71
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Jan 24 13:39:36 2014 +1000
r600g: add support for indirect geom ring writes
We need to be able to write to the ring using a base register
for when we emit vertices in a loop, in theory the SB compiler
could collapse these indirect writes to direct writes if the
register value is constant and known, but that is outside my
pay grade.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cda63db780512f7ca81f5e7973120d335e576ad6
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Dec 24 05:59:19 2013 +0000
r600g: write proper output prim type
Vadim's code derived it from the info.mode, but it needs
to be takes from the geometry shader output primitive.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b0be2015d6501d0f03ea1c6b0c36ffb301ac15a
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Dec 24 05:30:37 2013 +0000
r600g: enable instance cnt register with new enough kernel
The instance cnt register was missing for a few kernels,
with a new enough kernel we can output it.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4652babbde7bd9a7660ece7fe38ed16e294595e
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Dec 23 01:30:03 2013 +0000
r600g: add primitive input support for gs
only enable prim id if gs uses it
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0e842bd9f90d6b77eae085a168d5a6c49962bf3
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Dec 19 05:17:00 2013 +0000
r600g: emit streamout from dma copy shader
This enables streamout with GS in the mix, from the
VS dma shader.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20adc7449cc4abe2caf6d78d2c62cc0e6e86b87c
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Dec 18 15:55:07 2013 +1000
r600g/gs: fix cases where number of gs inputs != number of gs outputs
this fixes a bunch of the geom shader built-in tests
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=defebc0293a660155ef3027ee8cc65319379b2ed
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Jan 28 10:21:03 2014 +1000
r600g: increase array base for exported parameters
Trivial fix to Vadim's code.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9954e402f7e766876c80d31e40011dfd8240ecb
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Jan 24 16:41:32 2014 +1000
r600g: initialise the geom shader loop registers.
As we do for vertex and pixel shaders.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=461c463bb2cf324f34bf76562f9942ceb1d69dec
Author: Dave Airlie <airlied at redhat.com>
Date: Sat Nov 30 06:26:13 2013 +0000
r600g: emit NOPs at end of shaders in more cases
If the shader has no CF clauses at all emit an nop
If the last instruction is an ENDLOOP add a NOP for the LOOP to go to
if the last instruction is CALL_FS add a NOP
These fix a bunch of hangs in the geometry shader tests.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4782a58c30473e5f67c7361c6c57160f940a978
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Nov 28 23:38:35 2013 +0000
r600g: don't enable SB for geom shaders
SB needs fixes for three GS instructions it seems to raise
them outside loops etc despite my best efforts.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5758a76d04aef90342e2b823c5020c6addda6d9c
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Dec 24 04:56:25 2013 +0000
r600g/sb: add MEM_RING support
Although we don't use SB on geom shaders, the VS copy shader will use it
so we might as well implement MEM_RING support in sb.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eeead9b8ed77804f228bd9ba434e26b5c12d73ed
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Jan 29 04:08:43 2014 +0000
r600g: don't fail if we can't map VS->GS ring entries
This can happen in normal operation, so don't report an error on it,
just continue.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1371d65a7fbd695d3516861fe733685569d890d0
Author: Vadim Girlin <vadimgirlin at gmail.com>
Date: Fri Aug 2 06:38:23 2013 +0400
r600g: initial support for geometry shaders on evergreen (v2)
This is Vadim's initial work with a few regression fixes squashed in.
v2: (airlied)
fix regression in glsl-max-varyings - need to use vs and ps_dirty
fix regression in shader exports from rebasing.
whitespace fixing.
v2.1: squash fix assert
Signed-off-by: Vadim Girlin <vadimgirlin at gmail.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34ee1d0f9f64cd19ed0ddbbbf82db6230afca71d
Author: Vadim Girlin <vadimgirlin at gmail.com>
Date: Fri Aug 2 06:32:32 2013 +0400
r600g: add hw register definitions for GS block setup
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a144bc29b5bb8322a54308603c5d0a8467448164
Author: Vadim Girlin <vadimgirlin at gmail.com>
Date: Wed Jul 31 23:09:39 2013 +0400
r600g: defer shader variant selection and depending state updates
[airlied: fix dropped streamout line - fix for master]
Signed-off-by: Vadim Girlin <vadimgirlin at gmail.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae29a098eaaa9f061cc82a28b8e258e44f03902b
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Jan 13 10:19:00 2014 +1000
r600g/bc: add support for indexed memory writes.
It looks like we need these for geom shaders in the future.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=552aae7e47e93ada58649a92ae9e7da37afb05c3
Author: Vadim Girlin <vadimgirlin at gmail.com>
Date: Wed Jul 31 20:02:22 2013 +0400
r600g: move barrier and end_of_program bits from output to cf struct (v2)
v2: fix regression on r600 NOP instructions.
Signed-off-by: Vadim Girlin <vadimgirlin at gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29a43cb0b622d8e40362b386a85c33bdd1a9bb54
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Jan 29 01:33:14 2014 +0000
r600g: split streamout emit code into a separate function
For geometry shaders we need to call this code from a second place.
Just move it out for now to keep future patches cleaner.
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07075cf350a57bb61e6c99c7abb769f02b9068a7
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Feb 1 15:06:39 2014 +0100
r600g,radeonsi: skip unnecessary buffer_is_busy call, add a comment
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=08f0344cf395b7ceee20c4c4030946c9334895bc
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Feb 1 14:59:28 2014 +0100
r600g,radeonsi: skip busy-checking for DISCARD_RANGE if it has been done already
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=796e2fba8cc21f8e190bc143b6209ca417c54976
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Feb 1 14:01:20 2014 +0100
r600g,radeonsi: treat DYNAMIC and STREAM usage as STAGING
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0354b769c2ee865ed40e9994f2147f2d86e989b7
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Jan 17 22:52:28 2014 +0100
gallium: remove PIPE_CAP_MAX_COMBINED_SAMPLERS
This can be derived from the shader caps.
All GPUs from ATI/AMD, NVIDIA, and INTEL have separate texture slots
for each shader stage.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82c0914266ec53d59233b6d326bcfde7049da17b
Author: Brian Paul <brianp at vmware.com>
Date: Tue Feb 4 10:38:59 2014 -0700
mesa: remove stray bits of GL_EXT_cull_vertex
GL_EXT_cull_vertex was removed back in 2010 in commit 02984e3536
but these bits still lingered.
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f5740899fe8ee2d7fecebf1b9622e06dbc78f43
Author: Paul Berry <stereotype441 at gmail.com>
Date: Fri Jan 31 09:55:35 2014 -0800
glsl: Fix continue statements in do-while loops.
From the GLSL 4.40 spec, section 6.4 (Jumps):
The continue jump is used only in loops. It skips the remainder of
the body of the inner most loop of which it is inside. For while
and do-while loops, this jump is to the next evaluation of the
loop condition-expression from which the loop continues as
previously defined.
Previously, we incorrectly treated a "continue" statement as jumping
to the top of a do-while loop.
This patch fixes the problem by replicating the loop condition when
converting the "continue" statement to IR. (We already do a similar
thing in "for" loops, to ensure that "continue" causes the loop
expression to be executed).
Fixes piglit tests:
- glsl-fs-continue-inside-do-while.shader_test
- glsl-vs-continue-inside-do-while.shader_test
- glsl-fs-continue-in-switch-in-do-while.shader_test
- glsl-vs-continue-in-switch-in-do-while.shader_test
Cc: mesa-stable at lists.freedesktop.org
Acked-by: Carl Worth <cworth at cworth.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56790856b303ad5ba86d7eb261ade91edaa3ee0b
Author: Paul Berry <stereotype441 at gmail.com>
Date: Fri Jan 31 09:50:37 2014 -0800
glsl: Make condition_to_hir() callable from outside ast_iteration_statement.
In addition to making it public, we also need to change its first
argument from an ir_loop * to an exec_list *, so that it can be used
to insert the condition anywhere in the IR (rather than just in the
body of the loop).
This will be necessary in order to make continue statements work
properly in do-while loops.
Cc: mesa-stable at lists.freedesktop.org
Acked-by: Carl Worth <cworth at cworth.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=933be19cdf97aed977cd656e5c15c99cbdb52b7f
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Mon Jan 27 10:50:01 2014 +0200
i965/blorp: do not use unnecessary hw-blending support
This is really not needed as blorp blit programs already sample
XRGB normally and get alpha channel set to 1.0 automatically by
the sampler engine. This is simply copied directly to the payload
of the render target write message and hence there is no need for
any additional blending support from the pixel processing pipeline.
The blending formula is anyway broken for color components, it
multiplies the color component with itself (blend factor is the
component itself).
Alpha blending in turn would not fix the alpha to one independent
of the source but simply used the source alpha as is instead
(1.0 * src_alpha + 0.0 * dst_alpha).
Quoting Eric:
"If we want to actually make the no-alpha-bits-present thing work,
we need to override the bits in the surface state or in the
generated code. In the normal draw path, it's done for sampling
by the swizzling code in brw_wm_surface_state.c, and the blending
overrides is just to fix up the alpha blending stage which
doesn't pay attention to that for the destination surface."
If one modifies piglit test gl-3.2-layered-rendering-blit to use
color component values other than zero or one, this change will
kick in on IVB. No regressions on IVB.
This is effectively revert of c0554141a9b831b4e614747104dcbbe0fe489b9d:
i965/blorp: Support overriding destination alpha to 1.0.
Currently, Blorp requires the source and destination formats to be
equal. However, we'd really like to be able to blit between XRGB and
ARGB formats; our BLT engine paths have supported this for a long time.
For ARGB -> XRGB, nothing needs to occur: the missing alpha is already
interpreted as 1.0. For XRGB -> ARGB, we need to smash the alpha
channel to 1.0 when writing the destination colors. This is fairly
straightforward with blending.
For now, this code is never used, as the source and destination formats
still must be equal. The next patch will relax that restriction.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3c24c3accd1401cbe96098e44850bb1130d80b9
Author: Christian König <christian.koenig at amd.com>
Date: Mon Feb 3 02:28:58 2014 -0700
radeon/uvd: fix feedback buffer handling v2
Without the correct feedback buffer size UVD runs
into an error on each frame, reducing the maximum FPS.
v2: fixing Michels comments
Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
Cc: "10.1" "10.0" "9.2" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=adaa5a6ca66179a839742c4729a4fc76aa02991f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 09:27:09 2014 -0800
i965: Use brw_bo_map[_gtt]() in intel_miptree_map_raw().
This moves the intel_batchbuffer_flush before the drm_intel_bo_busy
call, which is a change in behavior. However, the old behavior was
broken.
In the future, we may want to only flush in the batchbuffer references
the BO being mapped. That's certainly more typical.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Carl Worth <cworth at cworth.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e396674d5fb06ef467c7b66cf14ff89df64f2101
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 09:24:32 2014 -0800
i965: Use brw_bo_map() in intel_texsubimage_tiled_memcpy().
This additionally measures the time stalled, while also simplifying the
code.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Carl Worth <cworth at cworth.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d613bafe9111a577bed6bb89ef559df40712674c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 09:09:18 2014 -0800
i965: Create drm_intel_bo_map wrappers with performance warnings.
Mapping a buffer is a common place where we could stall the CPU.
In a few places, we've added special code to check whether a buffer is
busy and log the stall as a performance warning. Most of these give no
indication of the severity of the stall, though, since measuring the
time is a small hassle.
This patch introduces a new brw_bo_map() function which wraps
drm_intel_bo_map, but additionally measures the time stalled and reports
a performance warning. If performance debugging is not enabled, it
simply maps the buffer with negligable overhead.
We also add a similar wrapper for drm_intel_gem_bo_map_gtt().
This should make it easy to add performance warnings in lots of places.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Carl Worth <cworth at cworth.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b886078dbff593ceb23b05b3ce78a3bb3cbcb94
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Feb 3 11:28:30 2014 -0500
freedreno: enabling binning and opt by default
Hw binning pass doesn't seem to have broken anything. And optimizing
compiler fixes a lot of shaders and doesn't seem to break anything. So
re-org slightly FD_MESA_DEBUG params and make both hw binning and
optimizer enabled by default.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=554f1ac00c43f4503b923e1a129c0039468dcb82
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 29 17:18:49 2014 -0500
freedreno/a3xx/compiler: new compiler
The new compiler generates a dependency graph of instructions, including
a few meta-instructions to handle PHI and preserve some extra
information needed for register assignment, etc.
The depth pass assigned a weight/depth to each node (based on sum of
instruction cycles of a given node and all it's dependent nodes), which
is used to schedule instructions. The scheduling takes into account the
minimum number of cycles/slots between dependent instructions, etc.
Which was something that could not be handled properly with the original
compiler (which was more of a naive TGSI translator than an actual
compiler).
The register assignment is currently split out as a standalone pass. I
expect that it will be replaced at some point, once I figure out what to
do about relative addressing (which is currently the only thing that
should cause fallback to old compiler).
There are a couple new debug options for FD_MESA_DEBUG env var:
optmsgs - enable debug prints in optimizer
optdump - dump instruction graph in .dot format, for example:
http://people.freedesktop.org/~robclark/a3xx/frag-0000.dot.png
http://people.freedesktop.org/~robclark/a3xx/frag-0000.dot
At this point, thanks to proper handling of instruction scheduling, the
new compiler fixes a lot of things that were broken before, and does not
appear to break anything that was working before[1]. So even though it
is not finished, it seems useful to merge it in it's current state.
[1] Not merged in this commit, because I'm not sure if it really belongs
in mesa tree, but the following commit implements a simple shader
emulator, which I've used to compare the output of the new compiler to
the original compiler (ie. run it on all the TGSI shaders dumped out via
ST_DEBUG=tgsi with various games/apps):
https://github.com/freedreno/mesa/commit/163b6306b1660e05ece2f00d264a8393d99b6f12
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0e2d7ab4615651b40e37205bed12c9ca92e84f3
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 29 17:03:07 2014 -0500
freedreno/a3xx/compiler: split out old compiler
For the time being, keep old compiler as fallback for things that the
new compiler does not support yet. Split out as it's own commit to make
the later new-compiler commits easier to follow.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a418573c4d7fc7f896e7077378d2b4daf98d5217
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 29 16:25:52 2014 -0500
freedreno/a3xx/compiler: prepare for new compiler
Shuffle things around to prepare for new compiler.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f08d2b1c0f6a1cb8e77e37806e97b7bbfae95b0a
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 29 16:13:54 2014 -0500
freedreno/a3xx: remove useless reg tracking in disasm-a3xx
Not really used for anything anymore. So strip it out and avoid
conflicting symbols with upcoming new-compiler.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1597788d122ac61032489539691ac0ff11d49b13
Author: Carl Worth <cworth at cworth.org>
Date: Mon Feb 3 13:54:50 2014 -0800
docs: Add release notes for 10.0.3
Which was just made.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc3fcd1e01093e8ab8d06d95c53f875ace57ca7f
Author: Brian Paul <brianp at vmware.com>
Date: Mon Feb 3 11:33:03 2014 -0700
draw: fix incorrect color of flat-shaded clipped lines
When we clipped a line weren't copying the provoking vertex
color to the second vertex. We also weren't checking for
first vs. last provoking vertex.
Fixes failures found with the new piglit line-flat-clip-color test.
Cc: "10.0, 10.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=349b76a55364c0bb33daa4e1ebe36dd689e35807
Author: Brian Paul <brianp at vmware.com>
Date: Sat Feb 1 10:51:43 2014 -0700
mesa: change GL_ALL_ATTRIB_BITS to 0xFFFFFFFF
This has been wrong for many years. It was originally 0x000FFFFF and long
ago there was discussion about whether GL_ALL_ATTRIB_BITS should include
the then-new GL_MULTISAMPLE_BIT bit. Eventually the ARB decided that
glPushAttrib(GL_ALL_ATTRIB_BITS) should save all current and future
attribute groups (hence ~0). Unfortunately, Mesa's gl.h was never updated.
This was just recently spotted by Eric Anholt and reported as a bug to the
ARB. Ian, Jon Leech and I discussed it at the ARB meeting and decided to
change Mesa's value to reflect the ARB's decision.
Acked-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=307fd76053da39242ada2701b0d32b2177fe3493
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:27:04 2014 -0700
gallium/auxiliary/indices: replace free() with FREE()
To match the CALLOC_STRUCT() call.
Cc: "10.0, 10.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97fdace6d70b6499d0490cd6ca2a4253284b386d
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:23:11 2014 -0700
svga: check shader size against max command buffer size
If the shader is too large, plug in a dummy shader. This patch also
reworks the existing dummy shader code.
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4686f610b18a04bc6213ccadf7be1176bbda3e34
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:23:11 2014 -0700
svga: refactor some shader code
Put common code in new svga_shader.c file. Considate separate vertex/
fragment shader ID generation.
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bace99d77642f8fbd46b1f0be025ad758f83f5e
Author: Zack Rusin <zackr at vmware.com>
Date: Tue Jan 28 16:34:18 2014 -0500
gallivm: fix opcode and function nesting
gallivm soa code supported only a single level of nesting for
control flow opcodes (if, switch, loops...) but the d3d10 spec
clearly states that those are nested within functions. To support
nesting of conditionals inside functions we need to store the
nesting data inside function contexts and keep a stack of those.
Furthermore we make sure that if nesting for subroutines is deeper
than 32 then we simply ignore all subsequent 'call' invocations.
Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=595bcf38a6620cc6b69b170bd5c48ace720dd607
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 22:04:13 2014 -0800
mesa: Drop unnecessary (void) ctx from VAO code.
ctx is always used, even on release builds.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4323b92479db30e6a2bdf0ac73c2816e410bc1c6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 21:25:42 2014 -0800
mesa: Remove "APPLE" from some VAO error messages.
Chances are, people will be using the core names these days.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf62e5967340b97030e3e1f07c8ead14efc7414a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 20:17:06 2014 -0800
mesa: Update some comments relating to VAOs.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1b1f2a687c219021f65219df59f412bc86daadd
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 19:46:45 2014 -0800
mesa: Rename ElementArrayBufferObj to IndexBufferObj.
DirectX and most hardware documentation use the term "Index Buffer" to
refer to a buffer containing indexes into arrays of vertex data, which
allows random access to vertex data, rather than sequential access.
OpenGL uses a different term for this concept: "Element Array Buffer".
However, "Index Buffer" has become much more widespread. A quick
Google search shows 29,300 hits for "Element Array Buffer" vs.
82,300 hits for "Index Buffer."
Arguably, "Index Buffer" is clearer: an "element of an array" (or list)
usually refers to an actual item stored in the array, not the index used
to refer to it.
The terminology is also already used in Mesa: some VBO module code for
dealing with ElementArrayBufferObj names local variables "ib".
Completely generated by:
$ find . -type f -print0 | xargs -0 sed -i \
's/ElementArrayBufferObj/IndexBufferObj/g'
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0354e50798d9f199c3a47b71e8c0a284bba5e8e6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 21:28:03 2014 -0800
mesa: Rename _mesa_lookup_arrayobj to _mesa_lookup_vao.
For consistency with the previous renames.
Completely generated by:
$ find . -type f -print0 | xargs -0 sed -i \
's/_mesa_lookup_arrayobj/_mesa_lookup_vao/g'
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de47fd2668961503bbdaaf1194e7bb435ad5dbb7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 20:48:51 2014 -0800
mesa: Rename _mesa_..._array_obj functions to _mesa_..._vao.
_mesa_update_vao_client_arrays() is less of a mouthful than
_mesa_update_array_object_client_arrays(), and generally clearer.
Generated by:
$ find . -type f -print0 | xargs -0 sed -i \
's/_mesa_\([^_]*\)_array_object/_mesa_\1_vao/g'
with manual whitespace and indentation fixes applied.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aac1415b66fafedc50c4346dae2d652723156ed9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 19:36:59 2014 -0800
mesa: Rename "struct gl_array_object" to gl_vertex_array_object.
I considered replacing it with "gl_vao", but spelling it out seemed to
fit better with Mesa's traditional style. Mesa doesn't shy away from
long type names - consider gl_transform_feedback_object,
gl_fragment_program_state, gl_uniform_buffer_binding, and so on.
Completely generated by:
$ find . -type f -print0 | xargs -0 sed -i \
's/gl_array_object/gl_vertex_array_object/g'
v2: Rerun command to resolve conflicts with Ian's meta patches.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=94e07c196075a494642d5617f96e36996c58d116
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 19:31:22 2014 -0800
mesa: Rename "arrayObj" local variables to "vao".
Now that the field is named "VAO" instead of "ArrayObj", it makes sense
to call the local variables "vao" instead of "arrayObj".
Completely generated by:
$ find . -type f -print0 | xargs 0 sed -i 's/arrayObj/vao/g'
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0dfe50f1a6cc5e1f979ac65cca4ed9359d18869d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Feb 1 19:14:38 2014 -0800
mesa: Rename ArrayObj to VAO and DefaultArrayObj to DefaultVAO.
When reading through the Mesa drawing code, it's not immediately obvious
to me that "ArrayObj" (gl_array_object) is the Vertex Array Object (VAO)
state. The comment above the structure explains this, but readers still
have to remember this and translate accordingly.
Out of context, "array object" is a fairly vague. Even in context,
"array" has a lot of meanings: glDrawArrays, vertex data stored in user
arrays, gl_client_arrays, gl_vertex_attrib_arrays, and so on.
Using the term "VAO" immediately associates these fields with the OpenGL
concept, clarifying the situation and aiding programmer sanity.
Completely generated by:
$ find . -type f -print0 | xargs -0 sed -i \
-e 's/ArrayObj;/VAO;/g' \
-e 's/->ArrayObj/->VAO/g' \
-e 's/Array\.ArrayObj/Array.VAO/g' \
-e 's/Array\.DefaultArrayObj/Array.DefaultVAO/g'
v2: Rerun command to resolve conflicts with Ian's meta patches.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=81144c049bc7c12e4edcdf28f91c3c024c6e8b2b
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Dec 13 16:51:04 2013 -0800
meta: Silence several 'unused parameter' warnings
Silences many GCC warnings of the form:
drivers/common/meta.c: In function 'cleanup_temp_texture':
drivers/common/meta.c:1208:41: warning: unused parameter 'ctx' [-Wunused-parameter]
drivers/common/meta.c: In function 'setup_ff_blit_framebuffer':
drivers/common/meta.c:1453:46: warning: unused parameter 'ctx' [-Wunused-parameter]
drivers/common/meta.c: In function 'meta_glsl_blit_cleanup':
drivers/common/meta.c:1998:43: warning: unused parameter 'ctx' [-Wunused-parameter]
drivers/common/meta.c: In function 'meta_glsl_clear_cleanup':
drivers/common/meta.c:2287:44: warning: unused parameter 'ctx' [-Wunused-parameter]
drivers/common/meta.c: In function 'setup_ff_generate_mipmap':
drivers/common/meta.c:3365:45: warning: unused parameter 'ctx' [-Wunused-parameter]
drivers/common/meta.c: In function 'meta_glsl_generate_mipmap_cleanup':
drivers/common/meta.c:3556:54: warning: unused parameter 'ctx' [-Wunused-parameter]
There are a couple other similar warnings, but they are less trivial. I
want to investigate these further before axing them.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bf4db1697a02cd58062e0ebac086fda72f29945
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Dec 13 13:40:48 2013 -0800
meta: Don't use fixed-function to decompress array textures
Array textures can't be used with fixed-function, so don't. Instead,
just drop the decompress request on the floor. This is no worse than
what was done previously because generating the GL error (in
_mesa_set_enable) broke everything anyway.
A later patch will get GL_TEXTURE_2D_ARRAY targets working.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb65d4b84d4c514bfa9114a56a08513efabbe030
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Dec 13 14:12:09 2013 -0800
meta: Use NDC in decompress_texture_image
There is no need to use pixel coordinates, and using NDC directly will
simplify the GLSL paths.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=abfa65ca811099332c8683dada9a2ee44cc01dc9
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Dec 14 11:27:29 2013 -0800
meta: Consistenly use non-Apple VAO functions
For these objects, meta was already using the non-Apple function to
delete the objects. Everywhere else in the file uses
_mesa_GenVertexArrays and _mesa_BindVertexArrays.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: "9.1 9.2 10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=070f55d8935af6fee62506b54bc86c1bf5049a82
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Dec 13 15:59:38 2013 -0800
meta: Fallback to software for GetTexImage of compressed GL_TEXTURE_CUBE_MAP_ARRAY
The hardware decompression path isn't even close to being able to handle
this. This converts the crash (assertion failure) in
"EXT_texture_compression_s3tc/getteximage-targets S3TC CUBE_ARRAY" to a
plain old failure.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: "9.1 9.2 10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fcb498302bff912ca4f3169d37cc04b58e77d0fa
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Dec 14 11:58:45 2013 -0800
meta: Release resources used by _mesa_meta_DrawPixels
_mesa_meta_DrawPixels creates a VAO and (potentially) two fragment
programs, but none of them are ever released. Leaking piles of memory
is generally frowned upon.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: "9.1 9.2 10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d3f92e881dbd9d1aff17bba0d182c8ef645a2ca
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Dec 13 14:36:17 2013 -0800
meta: Release resources used by decompress_texture_image
decompress_texture_image creates an FBO, an RBO, a VBO, a VAO, and a
sampler object, but none of them are ever released. Later patches will
add program objects, exacerbating the problem. Leaking piles of memory
is generally frowned upon.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: "9.1 9.2 10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a722454dac284e31564d62e537976070bba1eaf8
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Nov 23 12:16:57 2013 -0800
mesa: Use common _mesa_tex_target_to_index in tex param code
TEXTURE_BUFFER_INDEX has to be specially called out because it is not
allowed in any of the glTexParameter or glGetTexParameter functions.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=35e7027dab14b059344d7b93404c76d451ea2baf
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Nov 22 11:35:30 2013 -0800
mesa: Make target_enum_to_index available outside texobj.c
The next patch will use this function in another file.
v2: Rename _mesa_target_enum_to_index to _mesa_tex_target_to_index.
Suggested by Brian.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9451281aca86c9ee7cc5db6e964ef0414fb5a368
Author: Brian Paul <brianp at vmware.com>
Date: Sat Feb 1 08:58:43 2014 -0700
mesa: make several FBO functions static
The four functions in question weren't called from any other file.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3abd4f4d90c5827f74509c1f507ed71aa7be9a15
Author: Brian Paul <brianp at vmware.com>
Date: Sat Feb 1 08:58:43 2014 -0700
mesa: move glGenerateMipmap() code into new genmipmap.c file
Mipmap generation has nothing to do with FBOs.
v2: update gl_genexec.py too (not api_exec.c)
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfcb9bb20451aa7c74d8769ae043fb11503e8453
Author: Brian Paul <brianp at vmware.com>
Date: Sat Feb 1 08:58:43 2014 -0700
mesa: move glBlitFramebuffer code into new blit.c file
Just for better organization.
v2: update gl_genexec.py too (not api_exec.c)
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20fedfd80aa2402d2033215c538894c9f81e422a
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:38:35 2014 -0700
mesa: don't signal _NEW_TEXTURE in TexSubImage() functions
glTexSubImage(), glCopyTexSubImage() and glCompressedTexSubImage()
only change the texel data, not other state like texture size or format.
If a driver really needs do something special it can hook into the
corresponding driver functions or Map/UnmapTextureImage().
This should avoid some needless state validation effort.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c55e3e6811413ce5c3aabfcf8dfcf5eb8a53499e
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:38:35 2014 -0700
mesa: add some comments about mipmap generation
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e286b63c8faa116c3367b1987654d119db04268c
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:38:35 2014 -0700
mesa: simplify comment in texstorage.c
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b3e3838205fd6282eab064d9cd0b939ba8585b0
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:38:35 2014 -0700
mesa: formatting fixes, 78-column wrappings in dd.h
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=deb9dd6e27956c2f9d9402fe70f0ca7bfa529450
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:28:08 2014 -0700
mesa: remove target param from ctx->Driver.TexParameter()
Not really used anywhere.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c20b48c48e81159a43941966e35f90f96226d6fb
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:28:08 2014 -0700
gallivm: add a few const qualifiers
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6d94648cf275472736c15a41db1b91e10a85b87
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:27:04 2014 -0700
translate: reindent translate_sse.c
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8689076925ddc903685f2ac1563b5ea9dc677c15
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:32:28 2014 -0700
mesa: make _mesa_get_proxy_target() static
Wasn't used in any other file.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9eaed3eb6e6989427e73e4e63f0dc98c892151bf
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:10:41 2014 -0700
mesa: remove unused _mesa_select_tex_object() function
The _mesa_get_current_tex_object() function is now used everywhere that
_mesa_select_tex_object() was formerly used.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5df28381efe758ceebe6a6bb226763e5d527ec3
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:07:05 2014 -0700
swrast: use _mesa_get_current_tex_object() in swrastSetTexBuffer2()
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed7211589161c3ec3157b669120b5bf49dd54d54
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:06:39 2014 -0700
st/mesa: use _mesa_get_current_tex_object() in st_context_teximage()
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f09a1261add801d75e42d74a8f648a6b31766c28
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:05:53 2014 -0700
mesa: use _mesa_get_current_tex_object() in GetTexLevelParameteriv()
And update a related comment.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b4f6fada2f13e42a289f63a469450fb41a5968e
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:05:19 2014 -0700
radeon: use _mesa_get_current_tex_object() in radeonSetTexBuffer2()
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76c33e383c5b1134b0f1500cf88326e86631e7a9
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 27 12:04:01 2014 -0700
r200: use _mesa_get_current_tex_object() in r200SetTexBuffer2()
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cdeeef6c400979a0497afde52bf351a623a934f
Author: Paul Seidler <sepek at exherbo.org>
Date: Tue Jan 21 22:44:37 2014 +0100
build: move ARCH_LIBS definition outside of ASM definition
_mesa_streaming_load_memcpy is also needed even if assembling is disabled
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c849ecc19a4cb2951a8b9e8d257632f492ab2517
Author: Eric Anholt <eric at anholt.net>
Date: Thu Jan 30 10:44:58 2014 -0800
dri: Add a useful error message if someone's packages missed libudev deps.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=63546b8e3d217d81a67f6f291fab48b3f381a9ca
Author: Eric Anholt <eric at anholt.net>
Date: Thu Jan 30 10:30:57 2014 -0800
dri: Also support the loader with libudev.so.0.
As far as I know, this should be safe. If not, we have to decide whether
to have variable lookup of the functions, or just drop support for .so.0
(which is a year and a half old it looks like)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74127
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc00ec154bda15672861d1b508aa4aacdb306f68
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Feb 1 10:53:00 2014 -0500
freedreno: better manage our WFI's
Updates to non-banked registers, CP_LOAD_STATE, etc, need a WFI if there
is potentially pending rendering. Track this better, and add fd_wfi()
calls everywhere that might potentially need CP_WAIT_FOR_IDLE.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fe9df8f29106013f5b6e4407b4877f6bf3b493d
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 14 19:06:46 2014 -0500
freedreno/a3xx: add logicop
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d27be2633f2fc543a6d00d66dcb033798d44749
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 14 13:03:20 2014 -0500
freedreno/a3xx: handle frag z write
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=083b27a1b125ac286e3d3ae0b42dab4cf773a40f
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 14 07:35:23 2014 -0500
freedreno: resync generated headers
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=98c1111462f13cee705d5c0bd89f9bab510f299f
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 14 09:54:02 2014 -0500
freedreno/a3xx: fix const confusion
Gallium can leave const buffers bound above what is used by the current
shader. Which can have a couple bad effects:
1) write beyond const space assigned, which can trigger HLSQ lockup
2) double emit of immed consts, first with bound const buffer vals
followed by with actual immed vals. This seems to be a sort of
undefined condition.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c6961efae7d2baa224580af45f8d8968dda3a67
Author: Rob Clark <robclark at freedesktop.org>
Date: Sun Nov 10 18:29:46 2013 -0500
freedreno/a3xx/compiler: compiler cleanups
Drop color/pos/psize_regid, plus a few compiler and IR cleanups.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=69eca28dd0e2595ddb9c798dad9d01729addc096
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jan 13 18:03:42 2014 -0500
freedreno/compiler/a3xx: remove lowered instructions
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f2df4ff90b255456cfd45f5582016744fbfd0f7
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 15 08:08:18 2014 -0500
freedreno: add tgsi lowering pass
Currently lowers the following instructions:
DST, XPD, SCS, LRP, FRC, POW, LIT, EXP, LOG, DP4,
DP3, DPH, DP2
translating these into equivalent simpler TGSI instructions.
This probably should be moved to util so other drivers can use
it, but just adding under freedreno for now so that I can clear
out a lot of the lowering code in a3xx compiler before beginning
to add new compiler.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=752475619997ce1d596dd0073d0fa5785d8f2646
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 15 08:07:27 2014 -0500
freedreno/a3xx/compiler: add CLAMP
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fafe16a8a00da3f0d48aba313685f673744d8909
Author: Rob Clark <robclark at freedesktop.org>
Date: Sun Jan 12 13:55:05 2014 -0500
freedreno/a3xx/compiler: various fixes
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4971628baedf885ba6987a2946c6e24526464125
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Jan 11 10:34:36 2014 -0500
freedreno: ctx should hold ref to dev
The ctx should hold ref to dev to avoid problems if screen is destroyed
before ctx. Doesn't really fix the egl/glx issues, but at least it
prevents things from getting much worse.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=303df12db8a9b54a3471e259d8b38d1f4cf8b393
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 14 07:34:41 2014 -0500
freedreno: add prims-emitted driver query
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80bf1fbaf6bb3d9b7a8543ea764c6d19887ac0b8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jan 31 21:40:05 2014 -0800
i965: Silence unused variable 'ctx' warning.
Somehow I missed this before pushing the Broadwell PS state upload code.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1cdafe6f78b4e271fd22da2e8d92c2684282e77
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 30 17:50:02 2014 -0800
i965: Fix math instruction hstride assertions on Broadwell.
In the final revision of my gen8_generator patch, I updated the MATH
instruction's assertion from (dst.hstride == 1) to check that source and
destination hstride matched. Unfortunately, I didn't test this enough,
and many Piglit tests fail this test.
The documentation indicates that "scalar source is also supported",
which we believe means <0,1,0> access mode (hstride == 0). If hstride
is non-zero, then it must match the destination register.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8878055f5f46726822d03cd3a81e53e5ee50059
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 11:41:34 2013 -0700
i965: Add (disabled) Broadwell PCI IDs.
This puts the PCI IDs in place so it's easy to enable support. However,
it doesn't actually enable support since it's very preliminary still,
and a few crucial pieces (such as BLORP) are still missing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ade766684933ac84e41634429fb693f85353c11
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 6 03:07:54 2013 -0800
i965: Disable 3DSTATE_WM_HZ_OP fields.
Eric believes this to be wrong and unnecessary, as the command is
supposed to emit an implicit rectangle primitive. However, empirically
the pixel pipeline is completely unreliable without it. So for now, it
stays until someone comes up with a better solution.
We'll need to do better than this when we implement multisampling, HiZ,
or fast clears...but for now, this will do.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4c4e0ed64bceca57e19c0a9f53aae77d795aa937
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 4 23:19:55 2013 -0800
i965: Update GS state for Broadwell.
This is quite similar to the Gen7 code. The main changes:
- 48-bit relocations
- Thread count is specified as U/2-1 instead of U-1.
- An extra DWord (DW9) with clip planes, URB entry output length/offsets
- We need to program the "Expected Vertex Count" (VerticesIn)
v2: Set the number of binding table entries so they can be prefetched
(requested by Eric Anholt).
v3: Add a WARN_ONCE for a missing workaround.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0d4311072267aa5427eb2cacd820e96f114eba0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 15:20:37 2012 -0800
i965: Update multisampling state for Broadwell.
On previous platforms, 3DSTATE_MULTISAMPLE contained the number of
samples, pixel location, and the positions of each sample within a pixel
for each multisampling mode (4x and 8x). It was also a non-pipelined
command, presumably since changing the sample positions is fairly
drastic.
Broadwell improves upon this by splitting the sample positions out into
a separate non-pipelined state packet, 3DSTATE_SAMPLE_PATTERN. With
that removed, 3DSTATE_MULTISAMPLE becomes a pipelined state packet.
Broadwell also supports 2x and 16x multisampling, in addition to the 4x
and 8x supported by Gen7. This patch, however, does not implement 2x
and 16x.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9cd65e3289ecb1df7148d01d453f8804e75c087f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 14 03:58:30 2012 -0800
i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.
The amount of cut and paste from Gen7 is rather ugly, and should
probably be cleaned up in the future. Even the Gen7 code is in need of
some tidying though; many of the function parameters aren't used on
platforms that use level/layer rather than tile offsets. Tidying both
can be left to a future patch series. This at least gets things going.
v2: Rebase on Paul's rename of NumLayers -> MaxNumLayers.
v3: Shift QPitch by 2 when storing it in the packet. Bits 14:0 store
bits 16:2 of the actual value. Fixes tests.
v4: Add missing stencil buffer QPitch.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2fce1e3c6982ddb53cc60b84af64594c49e9e869
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 19:30:26 2012 -0800
i965: Update BLEND_STATE for Broadwell.
v2: Allow logic ops on all surface types. The UNORM restriction was
lifted with Haswell and I simply hadn't noticed. Also, add missing
BRW_NEW_STATE_BASE_ADDRESS dirty bit. Both caught by Eric Anholt.
v3: Fix swapped per-RT DWord pairs. Eliminates bizarre hacks.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=460e0df3308f896741c884cac427c13a0e187354
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 15:34:34 2012 -0800
i965: Update SF_CLIP_VIEWPORT for Broadwell.
It has additional fields to support clipping to the viewport even if
guardband clipping is enabled.
v2: Update for viewport array changes.
v3: No, seriously, update for viewport array changes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v1]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcbf25969ed0b7154506347efd9e7aaa945a3a16
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 16:39:03 2012 -0800
i965: Rework SURFACE_STATE entries for Broadwell.
v2: Add missing SCS setting in gen8_emit_buffer_surface_state (caught by
Eric Anholt).
v3: Use stored QPitch rather than recomputing it.
v4: Shift QPitch by 2 when setting it in the packet; bits 14:0 store
bits 16:2 of the actual value (fixes myriads of cube and array
texturing tests). Also, only enable cube face bits for cubemaps
(matches Chris Forbes' commit on master). Port to use offset64.
v5: s/gl_format/mesa_format/g
v6: Fix DW5 of renderbuffer state, which neglected to subtract
irb->mt->first_level. Use vertical_alignment() rather than
hardcoding 4. Use ffs for multisample counts rather than a
large switch statement (all caught/suggested by Eric).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=990aaf87c4740e0225db9f4395541938571727cd
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 14:45:19 2012 -0800
i965: Update SOL state for Broadwell.
Unlike on Gen7, we can directly set the offset via the state packet.
We also -have- to: the kernel SOL reset code won't work anymore.
v2: Fix copy and paste mistake in buffer stride setup; drop stale
comment (caught by Eric Anholt). Add a perf_debug for missing
MOCS setup.
v3: Rebase on Paul Berry's changes to CurrentVertexProgram.
v4: Fix SO Write Offset handling. We need to set bits 20 and 21 so the
hardware both loads and saves the offset. There's also a
restriction that 3DSTATE_SO_BUFFER can only be programmed once per
buffer between primitives, so the "reset to zero" code needed
reworking. Fixes most of the transform feedback Piglit tests.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v2]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd91ab662d64746ceaddc6de9c5d684ac725799f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:39:19 2012 -0800
i965: Update the code that disables unused shader stages for Broadwell.
v2: Also disable 3DSTATE_WM_CHROMAKEY for safety.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v1]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d3c351cfbeb7c948c474213662499d10447ffab
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 16:29:33 2013 -0700
i965: Update 3DSTATE_CLIP for Broadwell.
Broadwell's winding order, polygon fill, and viewport Z test fields have
moved to DWord 1 of 3DSTATE_RASTER.
v2: Add a perf_debug for a future optimization and improve commit
message (both suggested by Eric Anholt).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c0d7dbcb9575bd8126d4d4ef83753664b848d27
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 18:28:29 2012 -0800
i965: Rework vertex uploads for Broadwell.
v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed.
v3: Add WARN_ONCE and perf_debugs requested by Eric Anholt.
v4: Program 3DSTATE_SGVS even in the no-elements case so gl_VertexID
continues working. Fix 3DSTATE_VF_INSTANCING to not use an
element index to access the buffers array. Some ARB_draw_indirect
prep work.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=08a471495935665c55f2968e310d6e20193b02f1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 13:53:40 2012 -0800
i965: Update STATE_BASE_ADDRESS for Broadwell.
v2: Fix missing "change" bit on instruction state base address
(caught by Haihao Xiang).
v3: Add a perf_debug for missing MOCS setup, requested by Eric.
v4: Fix buffer sizes. The value, specified at bit 12 and up, is
actually measured in 4k pages. We need to round up to the
next multiple of 4k.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v3]
Reviewed-by: Matt Turner <mattst88 at gmail.com> [v4]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3c6d6f1e151f6a44a76038dccebe4434038dcb1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 21:00:27 2012 -0800
i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.
v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases.
v3: Add missing binding table entry counts. Don't worry about alpha
testing or alpha to coverage when setting the "Kill Pixel" bit;
those are specified in 3DSTATE_PS_BLEND (caught by Eric Anholt).
Drop unused _NEW_BUFFERS. Tidy comments.
v4: Rebase on Paul Berry's changes to CurrentFragmentProgram.
v5: Re-enable line stippling. It doesn't crash or anything.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v3]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20d9286f71253004a91acbcf4c257e84ee7df077
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:10:19 2012 -0800
i965: Rework 3DSTATE_VS for Broadwell.
v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to
urb_entry_output_offset to closer match the documentation.
v3: Only emit a non-zero constant buffer read length when active.
v4: Add missing binding table counts (caught by Eric).
v5: Rebase on Paul Berry's changes to CurrentVertexProgram.
v6: Drop bogus SBE read length/offset field code. We were programming
the wrong values, and our 3DSTATE_SBE code overrides any value we
put here anyway with the correct one.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v4]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c96686a6cc0f53965b99a55046d1c55a867f93b3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 18:43:59 2012 -0800
i965: Add the new 3DSTATE_PS_BLEND state packet.
v2: Only set GEN8_PS_BLEND_HAS_WRITEABLE_RT if color buffer writes are
enabled (caught by Eric Anholt).
v3: Set non-blending flags (writeable RT, alpha test, alpha to coverage)
for integer formats too. +14 Piglits.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v2]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=17768bb7b428f367e351bf9bfa480bd0d4e57442
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 17:52:31 2012 -0800
i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.
v2: Use stencil->_WriteEnabled instead of setting
GEN8_WM_DS_STENCIL_BUFFER_WRITE_ENABLE twice (suggested by Eric).
v3: Mask stencil->WriteMask and stencil->ValueMask with 0xff. The field
is only 8-bits, so we'd trip the new SET_FIELD assertion when core
Mesa gave us a value like 0xFFFFFFFF. The Gen7 code uses structure
field widths to implicitly do this truncation. Fixes Piglit tests.
v4: Use uint32_t for dw1/dw2, not uint8_t. Worst. Typo. Ever.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v2]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=90fff1354b81ab880f1d2c2945c374ad6d8fe44f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 14:37:33 2013 -0700
i965: Update SF, SBE, and RASTER state for Broadwell.
The attribute override portion of 3DSTATE_SBE was split out into
3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into
3DSTATE_RASTER.
v2: Set Force URB Read Offset bit. Eventually the URB read offset
should be set in 3DSTATE_VS, but that will require some refactoring.
v3: Rebase on viewport array changes.
v4: Improve comments about URB read length/offset overrides.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4552a22f0425149f9bb5722af46c1c8766ddc8db
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:50:22 2012 -0800
i965: Bump generation assertions on workaround flushes.
I haven't investigated whether these are necessary on Broadwell or not,
but for paranoia's sake, we may as well continue doing them for now.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2184b519cd2cbb7163d4757afb8d8dc193864c4d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:16:18 2012 -0800
i965: Duplicate gen7_atoms to gen8_atoms.
It's going to diverge significantly. Starting out with a copy allows
future patches to change atoms one by one.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f51ca46f0c7c3b87b62f6047b266faeffbaae619
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:09:44 2014 -0700
radeon: move driContextSetFlags(ctx) call after ctx var is initialized
CC: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d6d69bab6c74d92514b81a68c6c8b1dc428182a
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 17:09:44 2014 -0700
r200: move driContextSetFlags(ctx) call after ctx var is initialized
Otherwise, ctx was a garbage value.
CC: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d53603f1fb49dd839e427f161a8912cf58d80c8
Author: Roland Scheidegger <sroland at vmware.com>
Date: Fri Jan 31 19:47:37 2014 +0100
llvmpipe: fix denorm handling for r11g11b10_float format when blending
The code re-enabling denorms for small float formats did not recognize
this format due to format handling hacks (mainly, the lp_type doesn't have
the floating bit set).
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=606544214e0e45d1d93de16b4ac4851d8d71eb87
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Jan 28 14:44:39 2014 -0800
glsl: Expand non-expr & non-swizzle scalar rvalues in vectorizing.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f49a8c9a5b6f72eef05fa0382bb8c0db714f492
Author: Matt Turner <mattst88 at gmail.com>
Date: Wed Jan 29 12:48:51 2014 -0800
glcpp: Reject #version after the version has been resolved.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74166
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Carl Worth <cworth at cworth.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d4a6bd6bb4daf04a2ff2e0d2c01691c4e5d84be
Author: Carl Worth <cworth at cworth.org>
Date: Wed Jan 29 13:25:08 2014 -0800
glcpp: Rename the variable used to enable debugging.
The -p option we now use when calling bison means that this variable will be
named glcpp_parser_debug not yydebug. This was not caught when the -p option
was added because this variable isn't used in the code as committed. (I prefer
the declaration to remain since it allows a developer to easily find this
variable name to enable debugging.)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2dc93bd5d19fa389b314eddd6dd8a62fae2be1be
Author: Carl Worth <cworth at cworth.org>
Date: Wed Jan 29 14:19:04 2014 -0800
glcpp: Add "make check" test for comment-parsing bug
This is the innocent-looking but killer test case to verify the bug fixed in
the preceding commit.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71978cf66fe52152f376fb896b1b4d2f1624777d
Author: Carl Worth <cworth at cworth.org>
Date: Wed Jan 29 13:19:39 2014 -0800
glcpp: Don't enter lexer's NEWLINE_CATCHUP start state for single-line comments
In commit 6005e9cb28 a new start state of NEWLINE_CATCHUP was added to the
lexer. This start state is used whenever the lexer is emitting a NEWLINE token
to emit additional NEWLINE tokens for any newline characters that were skipped
by an immediately preceding multi-line comment.
However, that commit erroneously entered the NEWLINE_CATCHUP state for
single-line comments. This is not desired since in the case of a single-line
comment, the lexer is not emitting any NEWLINE token. The result is that the
lexer will remain in the NEWLINE_CATCHUP state and proceed to fail to emit a
NEWLINE token for the subsequent newline character, (since the case to match \n expects only the INITIAL start state).
The fix is quite simple, remove the "BEGIN NEWLINE_CATCHUP" code from the
single-line comment case, (preserving it only in exactly the cases where the
lexer is actually emitting a NEWLINE token).
Many thanks to Petri Latvala for reporting this bug and for providing the
minimal test case to exercise it. The bug showed up only with a multi-line
comment which was followed immediately by a single-line comment (without any
intervening newline), such as:
/*
*/ // Kablam!
Since 6005e9cb28, and before this commit, that very innocent-looking
combination of comments would yield a parse failure in the compiler.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72686
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df21f31788f2dc610ac069b92e5ab652d7e78bcd
Author: Brian Paul <brianp at vmware.com>
Date: Fri Jan 31 09:52:10 2014 -0700
mesa: use _mesa_align_free() in _mesa_delete_buffer_object()
To match _mesa_align_malloc() call in _mesa_buffer_data().
Found by Colin Harrison <colin.harrison at virgin.net>
Signed-off-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db8b6fb2dfcbbb7ae53371f2835aa08553b6f37d
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Thu Jan 30 16:47:28 2014 +0900
st/dri: Fix tests for no draw/read buffers in dri_make_current()
Fixes piglit glx/GLX_ARB_create_context/current with no framebuffer.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fbd1b0cb576b46ac8df2697cb388db78f48012d
Author: Keith Packard <keithp at keithp.com>
Date: Sun Jan 26 16:14:29 2014 -0800
dri3: Track current Present swap mode and adjust buffer counts
This automatically adjusts the number of buffers that we want based on
what swapping mode the X server is using and the current swap interval:
swap mode interval buffers
copy > 0 1
copy 0 2
flip > 0 2
flip 0 3
Note that flip with swap interval 0 is currently limited to twice the
underlying refresh rate because of how the kernel manages flipping. Moving
from 3 to 4 buffers would help, but that seems ridiculous.
v2: Just update num_back at the point that the values that change num_back
change. This means we'll have the updated value at the point that the
freeing of old going-to-be-unused backbuffers happens, which might not
have been the case before (change by anholt, acked by keithp).
Signed-off-by: Keith Packard <keithp at keithp.com>
Signed-off-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aea4757eb4caf6f980fdaa2b9345f26329c29d12
Author: Keith Packard <keithp at keithp.com>
Date: Thu Nov 21 20:08:35 2013 -0800
dri3, i915, i965: Add __DRI_IMAGE_FOURCC_SARGB8888
The __DRIimage createImageFromFds function takes a fourcc code, but there was
no fourcc code that match __DRI_IMAGE_FORMAT_SARGB8. This adds a define for
that format, adds a translation in DRI3 from __DRI_IMAGE_FORMAT_SARGB8 to
__DRI_IMAGE_FOURCC_SARGB8888 and then adds translations *back* to
__IMAGE_FORMAT_SARGB8 in both the i915 and i965 drivers.
I'll refrain from comments on whether I think having two separate sets of
format defines in dri_interface.h is a good idea or not...
Fixes piglit glx-tfp and glx-visuals-depth
Signed-off-by: Keith Packard <keithp at keithp.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f12d6d613acd3f85309e4a3063871b188c93a145
Author: Keith Packard <keithp at keithp.com>
Date: Mon Nov 25 22:57:42 2013 -0800
dri3: Flush XCB before blocking for special events
XCB doesn't flush the output buffer automatically, so we have to call
xcb_flush ourselves before waiting.
Signed-off-by: Keith Packard <keithp at keithp.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=09d6c1972037a5519488094afd225f793d2188d0
Author: Keith Packard <keithp at keithp.com>
Date: Mon Nov 25 21:24:54 2013 -0800
dri3: Enable GLX_INTEL_swap_event
Now that we're tracking SBC values correctly, and the X server has the
ability to send the GLX swap events from a PresentPixmap request, enable
this extension.
Signed-off-by: Keith Packard <keithp at keithp.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1525474eadf5ca000162e05b99d591998d1ed3f6
Author: Keith Packard <keithp at keithp.com>
Date: Mon Nov 25 21:21:40 2013 -0800
dri3: Fix dri3_wait_for_sbc to wait for completion of requested SBC
Eric figured out that glXWaitForSbcOML wanted to block until the requested
SBC had been completed, which means to wait until the
PresentCompleteNotify event for that SBC had been received.
This replaces the simple sleep(1) loop (which was bogus) with a loop that
just checks to see if we've seen the specified SBC value come back in a
PresentCompleteNotify event yet.
The change is a bit larger than that as I've broken out a piece of common
code to wait for and process a single Present event for the target
drawable.
Signed-off-by: Keith Packard <keithp at keithp.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71d614250ed1f83d8da3adb8e855ee00201c70da
Author: Keith Packard <keithp at keithp.com>
Date: Mon Nov 25 21:14:55 2013 -0800
dri3: Track full 64-bit SBC numbers, instead of just 32-bits
Tracking the full 64-bit SBC values makes it clearer how those values are
being used, and simplifies the wait_msc code. The only trick is in
re-constructing the full 64-bit value from Present's 32-bit serial number
that we use to pass the SBC value from request to event.
Signed-off-by: Keith Packard <keithp at keithp.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34a8a0820fa08037acd0e4fbc368d72c1a6209f1
Author: Mark Mueller <markkmueller at gmail.com>
Date: Sun Jan 26 10:43:23 2014 -0800
mesa: Add warning to _REV pack/unpack functions with incorrect behavior
Signed-off-by: Mark Mueller <MarkKMueller at gmail.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=03065ea05cd601021dc20b9d809ec75e63621e31
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Dec 12 18:28:52 2013 +0330
r600g: Removed unnecessary positivity check for unsigned int variable.
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f26ad00d7f70af72b8ca53604c62587fc2173c4
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Wed Jan 29 18:24:04 2014 +0900
st/dri: Allow creating OpenGL 3.3 core contexts
Enables OpenGL 3.3 piglit tests.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbecd958a7e36736a4447ebe65e5017e5c0ea4a0
Author: Kristian Høgsberg <krh at bitplanet.net>
Date: Wed Jan 29 11:40:25 2014 -0800
build: Share the all-local rule for linking libraries into the build dir
This consolidates how we link the libraries into the build directory.
It works for lib_LTLIBRARIES but not custom shared libraries like DRI
drivers or gallium state trackers which needs special casing (cf dri
mega drivers, for example)
Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7965908976cdd1476db0ee7258d182292f975800
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Thu Jan 23 17:59:39 2014 +0000
loader: do not print the pci id during normal operation
Spamming the pci id is not beneficial. Make sure it's printed
only when needed.
v2: Change severity to _LOADER_DEBUG, rather than removing
the message.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=780dfc1fec491d5c5c6982b9feccf01d5a45660b
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Jan 28 01:20:45 2014 +0000
loader: print WARNING and FATAL messages using the default logger
Lower values are used for more severe cases.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4c35e3259493690850d292f819457a9a2bbe0abd
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Thu Jan 23 17:43:16 2014 +0000
glsl: s/_NDEBUG/NDEBUG/
The former symbol is never defined within mesa. Based on the code
it seems that the original intent was to use NDEBUG.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3afbe3ad76ee10905b70115fd0f20ef48a8cef2
Author: Kristian Høgsberg <krh at bitplanet.net>
Date: Wed Jan 29 10:30:23 2014 -0800
dir-locals.el: Set indent-tabs-mode true for makefile-mode
Makefiles need hard tabs, let's not make that harder than it needs to be.
Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e894e213b4a1e187c0d0fca8c6d3456a119a485
Author: Courtney Goeltzenleuchter <courtney at lunarg.com>
Date: Thu Jan 23 13:53:42 2014 -0700
mesa: Return after ScissorArrayv or ScissorIndexed detect a parameter error
Fixes piglit arb_viewport_array-scissor-ignore.
Signed-off-by: Courtney Goeltzenleuchter <courtney at LunarG.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Jon Ashburn <jon at lunarg.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca385bffa6b4f9d18879240e739413d45a068c3b
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Wed Jan 22 16:17:48 2014 -0800
docs: Add GL_ARB_map_buffer_alignment status to GL3.txt and release notes
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fd6ad7adcf8a1c0fc1b2746d47ba5f05b8a3c7f
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:42 2013 +0330
mesa: GL_ARB_map_buffer_alignment is not optional
Every driver supports it. All current and future Gallium drivers always
support it, and all existing classic drivers support it.
v2: Making GL_ARB_map_buffer_alignment a desktop OpenGL extension only.
v3: Squash two commits together.
v4 (idr): MIN_MAP_BUFFER_ALIGNMENT queries don't have any dependencies.
In previous versions of the patch it depended on EXTRA_API_GL which
would prevent the query from working in core profile contexts.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9aaa96ec3a75cdb5ce57e3487441b113391acc9
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:39 2013 +0330
nouveau: Use gl_constants::MinMapBufferAlignment as the alignment in nouveau_bo_new
This driver does not support GL_ARB_map_buffer_range, so no special
treatment is needed for unaligned offsets in the mapping.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d38867d80c299350a9e67b519df46a8dfcb03eb9
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:38 2013 +0330
radeon / r200: Use gl_constants::MinMapBufferAlignment as the alignment in radeon_bo_open
These drivers do not support GL_ARB_map_buffer_range, so no special
treatment is needed for unaligned offsets in the mapping.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f772d51c256b9e6458a4f9cf2021eadef34c8313
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:37 2013 +0330
mesa: Use _mesa_align_malloc in _mesa_buffer_data
v2: Fixed memory leak.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=689b20cfe061215cf01705ed17ac50806458404b
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:36 2013 +0330
mesa: Set gl_constants::MinMapBufferAlignment to 64 by default
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6bb27ee51c71bf5392fed797fe34c7a211c2cce3
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:35 2013 +0330
mesa/st: Unconditionally enable ARB_map_buffer_alignment.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=25c14f40f375e06bf12693c330c4fe7ef35a085b
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Wed Jan 22 14:02:42 2014 -0800
freedreno: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
Allocations actually have page alignment, but 64 is still a reasonable
value.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=205e6240480fef8ee1354e8810954eadb5ffde22
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:34 2013 +0330
ilo: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
Ian manually ran the map_buffer_range* tests and the
arb_map_buffer_alignment-* tests, but he did not do a full piglit run.
v2 (idr): Use 64 instead of 4096
Tested-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Chia-I Wu <olvaffe at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=75081391a4c7fcb6b46447139c7058fe3688fe3c
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:33 2013 +0330
svga: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
v2: Fixed setting switch cases prior to
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d273fe72df664435c7340523f66467d01f206525
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Tue Dec 3 08:23:06 2013 +0330
i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
v2: Fixed setting switch cases prior to
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4329e99b2368c7e91bef848a6f218abe79bb6bf9
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Tue Dec 3 08:20:32 2013 +0330
i915g: Use alignment of 64 instead of 16 for buffer allocation
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=809d3a7d25cd97a18e4ce4182103f66661d0a27d
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:30 2013 +0330
llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
v2: Fixed setting switch cases prior to
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6317664de0a31dd5af796fbbd61656f44c1b13ce
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 21:14:31 2013 +0330
llvmpipe: Use alignment of 64 instead of 16 for buffer allocation
v2: Changed allocation alignment of llvmpipe_displaytarget_layout.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c83b34c43bfca5aa4cec1417d07a1197257e420a
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 12:26:28 2013 +0330
softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64
v2: Fixed setting switch cases prior to
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e36759a81ed7da80f21626bcbe5e338b9f76c270
Author: Siavash Eliasi <siavashserver at gmail.com>
Date: Thu Nov 28 21:10:29 2013 +0330
softpipe: Use alignment of 64 instead of 16 for buffer allocation
v2: Changed allocation alignment in softpipe_displaytarget_layout.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
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