Mesa (broadwell): 123 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Sat Feb 8 06:41:18 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea15a5982be601c5ad8bcb904cc645e6bb480684
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 7 14:02:36 2014 -0800
i965: Enable fast depth clears.
They work fine now, too.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77c6f68cb0ca9bc56abd308b2560bad2614ca965
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 17:13:24 2014 -0800
i965: Enable HiZ on Broadwell.
It appears to work fine.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f7279c246cdcb4b4e6f60e2425bfbff99d2d5da
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 17:06:12 2014 -0800
i965: Implement HiZ resolves on Broadwell.
Broadwell's 3DSTATE_WM_HZ_OP packet makes this much easier.
Instead of programming the whole pipeline, we simply have to emit the
depth/stencil packets, a state override, and a pipe control. Then
arrange for the state to be put back. This is easily done from a single
function.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=35d482a99d15075d176357d4e4480383055faf86
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 17:02:37 2014 -0800
i965: Refactor Gen8 depth packet emission.
The existing code followed the vtable function signature, which is not a
great fit: many of the parameters are unused, and the function still
inspects global state, making it less reusable.
This patch refactors the depth buffer packet emission code into a new
function which takes exactly the parameters it needs, and which uses no
global state. It then makes the existing vtable function call the new
one.
Ideally, we would remove the vtable function, and clean up that
interface. But that can happen once HiZ is working.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=759e7767b7d4589ec80c34aa6f988f181c86b3ab
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 16:49:31 2014 -0800
i965: Add #defines for the 3DSTATE_WM_HZ_OP packet's contents.
We're going to need these to implement HiZ.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3fb080eb31869f5f800c47f9ed40af3404d496d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 07:32:49 2014 -0800
i965: Bump generation check in code to disable HiZ at LODs > 0.
Broadwell's "HiZ Resolve" operation still has the restriction that the
rectangle primitive must be 8x4 aligned. So I believe we still need
this.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=12591bf9b87731912567646989d2a702c5aaa079
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 07:21:41 2014 -0800
i965: Program 3DSTATE_HIER_DEPTH_BUFFER properly on Broadwell.
HiZ buffers still don't exist, but when they do, we'll set them up.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db4d1ba801807a9864bf7c69acb80982f8b07006
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 7 22:22:45 2014 -0800
i965: Pull format conversion logic out of brw_depthbuffer_format.
brw_depthbuffer_format is not very reusable at the moment, since it
uses global state (ctx->DrawBuffer) to access a particular depth buffer.
For HiZ on Broadwell, I need a function which simply converts the
formats. However, at least one existing user of brw_depthbuffer_format
really wants the existing interface. So, I've created a new function.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfe9196efba248e32e97990b4ce8d8caa9a4e39b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 27 15:49:56 2014 -0800
i965/fs: Implement scratch read/write support for Broadwell.
To make sure that both the Gen4 and Gen7 style messages work, I
initially disabled the SHADER_OPCODE_GEN7_SCRATCH_READ optimization,
ran Piglit, re-enabled it, and ran Piglit again. Both worked fine.
Fixes 40 Piglit tests (most of the varying-packing category).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f3527f964b6e136829ce5c6ecc4844f2ad1a54b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 27 15:44:18 2014 -0800
i965: Add Gen8 assembly support for DP Scratch messages.
The new accessors will make it easy to do Gen7-style scratch messages.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8d4afdbe6e4528c130d8a4bc1532cdb88e09a86
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Feb 4 22:18:03 2014 -0800
i965: Store absolute thread count in max_wm_threads on Broadwell.
In the past, 3DSTATE_PS took an absolute number of threads. Conversely,
on Broadwell you always program 64, and it implicitly scales based on
the GT-level with no special programming. So, I stored 64 in
brw_device_info::max_wm_threads.
However, I didn't realize that we also use max_wm_threads to compute the
size of the scratch space buffer. In that case, we really need the
absolute number of threads.
This patch hardcodes 3DSTATE_PS to use the value it expects, and changes
max_wm_threads back to a (completely fake) absolute thread count (once
again copied from Haswell).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70900de40ca99472dab6eea677cd8353f3dc2aa4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 13:45:27 2014 -0800
i965/fs: Implement FS_OPCODE_[UN]PACK_HALF_2x16_SPLIT[_XY] opcodes.
I'd neglected to port these to Broadwell. Most of this code is copy
and pasted from Gen7, but instead of using F32TO16/F16TO32, we just
use MOV with HF register types.
Fixes fs-packHalf2x16 and fs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29b3527c8b8dba6ccc74bed10e4083ffa40fd3de
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 14:16:27 2014 -0800
i965: Drop bogus F32TO16/F16TO32 instructions on Broadwell - use MOV.
Broadwell removed the F32TO16 and F16TO32 instructions. However, it has
actual support for HF values, so they're actually just MOV.
Fixes vs-packHalf2x16 and vs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa9a848c93cc03165ecd9edd3e8746ac46dc4806
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:56:38 2014 -0800
stash - vp fixes?
doesn't seem to actually fix anything.
oh, this might only be relevant when I turn on the viewport extents test
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=06f793693368187fc09475865a6c35dc96653cc9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 14:30:39 2014 -0800
i965: Fix General and Indirect Base Addresses on Broadwell.
I set the "address modify enable" bit in the wrong DWord. The first
DWord is the high 16 bits of the address, while the second is the low
32-bits and enable bit.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=613856dc48b1b97e72758eac70f8491390ed2e20
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 10:45:31 2014 -0800
i965: Drop VECTOR_MASK_ENABLE in Broadwell's 3DSTATE_VS packet.
We never set it on previous generations, but I had to set it in
3DSTATE_PS for correct behavior. For symmetry, I set it in 3DSTATE_VS
as well, but there's no actual need to do so. Piglit works fine either
way. The documentation also remarks that there should never be a need
to program this.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=614ee2d23085ef27b82687af500bad4f709a0b94
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 30 15:30:19 2014 -0800
i965: Use MOV, not OR for setting URB write channel enables on Gen8+.
On Broadwell, g0.5 contains the "Scratch Space Pointer"; using OR
puts some bits of that into "ignored" sections of our message header.
While this doesn't hurt, it's also not terribly /useful/. Using MOV
is sufficient to set the only interesting bits in this part of the
message header.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=718928d157b8572aa4edc51cde335c80702f0db8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 30 22:07:20 2013 -0800
i965: Enable Broadwell support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=545984e8c07036c6b8706e831a594e76ea803929
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:06:30 2014 -0800
i965: Add missing sample shading bits to Gen8's 3DSTATE_PS_EXTRA.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb401a5e3d010ce3497275d921d099cfd1a2c708
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 16:31:31 2014 -0800
i965/gs: Fix EndPrimitive on Broadwell.
My earlier patch (i965: Reserve space for "Vertex Count" in GS outputs.)
incremented Global Offset for most URB writes to make room for the new
"Vertex Count" field, but failed to shift the URB writes used for
writing control bits.
Confusingly, Global Offset must be incremented by 2 here, rather than 1.
The URB writes we use for actual data are HWord writes, which treat
Global Offset as a 256-bit offset. These are OWord writes, so it's
treated as a 128-bit offset instead.
Cc: Paul Berry <stereotype441 at gmail.com>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5366c2b3b22c3c77ee4c0485cd0cd3fdd148131a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Jan 28 22:02:56 2014 -0800
Also emit VF_INSTANCING in the no-elements case.
I can't imagine why this would matter since there's no actual data being
pulled, but...for safety?
Not observed to help anything
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ced393d79a153e032c6498410bb565f7c5e0ecd8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 26 00:20:21 2014 -0800
i965: Implement a CS stall workaround
According to the latest documentation, any PIPE_CONTROL with the
"Command Streamer Stall" bit set must also have another bit set,
with five different options:
- Render Target Cache Flush
- Depth Cache Flush
- Stall at Pixel Scoreboard
- Post-Sync Operation
- Depth Stall
I chose "Stall at Pixel Scoreboard" since we've used it effectively
in the past, but the choice is fairly arbitrary.
Implementing this in the PIPE_CONTROL emit helpers ensures that the
workaround will always take effect when it ought to.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d70c4cf3603bb17965cc620cda47cd5124319a8e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 11:05:46 2014 -0800
i965/vec4: Support arbitrarily large sampler indices on Broadwell+.
I added support for these on Haswell, but forgot to update the Broadwell
code before landing it. Fixes Piglit's max-samplers test.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=32d63d02a5ddbdd36b15908bb59f183fe7c65c9e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 10:58:25 2014 -0800
i965/fs: Support arbitrarily large sampler indices on Broadwell+.
I added support for these on Haswell, but forgot to update the Broadwell
code before landing it. Partially fixes Piglit's max-samplers test.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f969023f804d6aaccd45e85c060912e167762a7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 23 10:55:16 2014 -0800
i965/fs: Fix Broadwell texture header setup to be uncompressed.
MOV_RAW disables masking, but doesn't force the instruction to be
uncompressed. That needs to be done by hand.
Fixes textureGather and texture offset tests.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdc165e82a16b1eaba360955b856c528be354930
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 7 21:53:18 2014 -0800
mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.
In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally
renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and
MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their
sense. The commit message was correct, but what sed commands actually
got run didn't match that.
This patch swaps the two enum names, reversing them. This should undo
the damage, but might break things if people have manually fixed a few
instances in the meantime...
Mark's commit also failed to mention renames:
s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g
s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g
but those seem okay.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcb0330d309cdfc7c46ccb7455525f9d888eab0b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:47:10 2014 -0800
i965: Label JIP and UIP in Broadwell shader disassembly.
This makes it obvious which number is which.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a7fe50067cf0f0d9af4610b6e10890235fe313d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:35:50 2014 -0800
i965: Don't disassemble UIP field for Broadwell WHILE instructions.
The WHILE instruction doesn't have UIP. It only has JIP.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5230655a2ee46ad2215d8d97de2e6a6907cc47e2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 01:32:39 2014 -0800
i965: Don't print source registers for Broadwell flow control.
The bits which normally contain the source register descriptions
actually contain the JIP/UIP jump targets, which we already printed.
Interpreting JIP/UIP as source registers results in some really creepy
looking output, like IF statements with acc14.4<0,1,0>UD sources.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e0a0e4d30be142235c2b2439fe82935b8c67888
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 7 13:56:27 2014 -0800
i965: Fix fast depth clear values on Broadwell.
Broadwell's 3DSTATE_CLEAR_PARAMS packet expects a floating point value
regardless of format. This means we need to stop converting it to
UNORM.
Storing the value as float would make sense, but since we already have a
uint32_t field, this patch continues shoehorning it into that. In a
sense, this makes mt->depth_clear_value the DWord you emit in the
packet, rather than the clear value itself.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=882e98e5e6e63787d0eac572c461605e69fc1589
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Fri Feb 7 23:04:43 2014 +0100
nvc0: handle TGSI_SEMANTIC_LAYER
Cc: 10.1 <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd2229d4c68ed78a50104637aef904f8ab6d7dd3
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Fri Feb 7 22:51:27 2014 +0100
nvc0: create the SW object
It's required for being able to use software methods now.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7233acf782a39c7e5643cb303022360664b6046
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Fri Feb 7 22:39:44 2014 +0100
nvc0/ir/emit: hardcode vertex output stream to 0 for now
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c14c5c62a1b4648381c05f024db730e4a0f90c5
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Feb 2 22:00:18 2014 +1300
i965: Enable ARB_texture_gather for one component on Gen6.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31d1077dd2f0fec34ac221168943cecc8c9afbf0
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Mon Feb 3 22:15:41 2014 +1300
i965/vec4: Emit shader w/a for Gen6 gather
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=73b91fe05a2b4a09b29c69cfefda3f6c3d0ea68c
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Mon Feb 3 22:15:16 2014 +1300
i965/fs: Emit shader w/a for Gen6 gather
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2d51aaa11c2593edb9f4b9279745d39c79ff23c
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Mon Feb 3 22:14:45 2014 +1300
i965: Add surface format overrides for Gen6 gather
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b7bbd89e87c4025cfc5513a078b1e7a10640357
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Mon Feb 3 22:13:03 2014 +1300
i965: Add Gen6 gather wa to sampler key
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e12dafcac4aac50bc588cead4cc0d6291718edd
Author: Eric Anholt <eric at anholt.net>
Date: Fri Nov 1 12:29:12 2013 -0700
glsl: Optimize triop_csel with all-true or all-false.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de796b0ef09f05ca3f8a568ed07293e28ae697b0
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 18 11:06:16 2014 -0800
glsl: Optimize various cases of fma (aka MAD).
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44577c48573acdbc8a708e6613f367507e9eafc5
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 18 11:00:51 2014 -0800
glsl: Optimize lrp(x, x, coefficient) --> x.
total instructions in shared programs: 1627754 -> 1624534 (-0.20%)
instructions in affected programs: 45748 -> 42528 (-7.04%)
GAINED: 3
LOST: 0
(serious sam, humus domino demo)
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d72956790fed5f62b8eea5938ed432544530f7bd
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 18 10:57:29 2014 -0800
glsl: Optimize pow(x, 1) -> x.
total instructions in shared programs: 1627826 -> 1627754 (-0.00%)
instructions in affected programs: 6640 -> 6568 (-1.08%)
GAINED: 0
LOST: 0
(HoN and savage2)
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d7c123d6ce46e71ef22e431b76e972b9be1a157
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 18 10:47:19 2014 -0800
glsl: Optimize log(exp(x)) and exp(log(x)) into x.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c2aa353366c610382273bea10656e6d6960ce3b
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 18 10:36:28 2014 -0800
glsl: Optimize ~~x into x.
v2: Fix pasteo of an extra abs being inserted (caught by many). Rewrite
to drop the silly switch statement.
Reviewed-by: Matt Turner <mattst88 at gmail.com> (v1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f6279bab29614e3764a333242680ead78068d91
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 30 18:19:21 2013 -0800
i965: Add some informative debug when the X Server botches DRI2 GetBuffers.
We've had various bug reports over the years where miptrees are missing,
and when I screwed it up while adding DRI2 to the modesetting driver, I
figured I should put the info necessary for debug here.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5e5f34dd2d47622a41ff9908088c37dfbcca4cd
Author: Eric Anholt <eric at anholt.net>
Date: Mon Sep 30 15:19:54 2013 -0700
i965: Remove redundant check in blitter-based glBlitFramebuffer().
The intel_miptree_blit() code checks the format for us now, plus it
handles xrgb vs argb for us.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=697f401a31092ee13fb7a9c3d8e5ba823d72072a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 14:12:51 2014 -0800
i965: Fix Gen8+ disassembly of half float subregister numbers.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e990234ff6fd0f8d393cc600bf4dc681105cc30c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 20:51:28 2014 -0800
i965: Use the new brw_load_register_mem helper for draw indirect.
This makes it work on Broadwell, too.
v2: Drop bogus double write to 3DPRIM_BASE_VERTEX register
(caught by Chris Forbes).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7c435b26124464f18672acd17416ddd840d306b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 20:43:49 2014 -0800
i965: Implement a brw_load_register_mem helper function.
This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64
distinction.
Placing the function in intel_batchbuffer.c is rather arbitrary; there
wasn't really an obvious place for it.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f97119950515c841bca98a890e5110206bad945
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 3 11:13:48 2014 -0800
i965: Fix INTEL_DEBUG=vs for fixed-function/ARB programs.
Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs
has caused a NULL pointer dereference for fixed-function/ARB programs.
In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the
gl_shader_program. This is different than the FS visitor.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2062f40d81de4743758851b03dad506f9cb6f306
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 21:42:00 2014 -0800
glsl: Don't lose precision qualifiers when encountering "centroid".
Mesa fails to retain the precision qualifier when parsing:
#version 300 es
centroid in mediump vec2 v;
Consider how the parser's type_qualifier production is applied.
First, the precision_qualifier rule creates a new ast_type_qualifier:
<precision: mediump>
Then the storage_qualifier rule creates a second one:
<flags: in>
and calls merge_qualifier() to fold in any previous qualifications,
returning:
<flags: in, precision: mediump>
Finally, the auxiliary_storage_qualifier creates one for "centroid":
<flags: centroid>
it then does $$ = $1 and $$.flags |= $2.flags, resulting in:
<flags: centroid, in>
Since precision isn't stored in the flags bitfield, it is lost. We need
to instead call merge_qualifier to combine all the fields.
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reported-by: Kevin Rogovin <kevin.rogovin at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f47e5962885d9f7de23a8c9c9ba035017e24ffd6
Author: Brian Paul <brianp at vmware.com>
Date: Fri Feb 7 09:32:05 2014 -0700
st/mesa: avoid sw fallback for getting/decompressing textures
If st_GetTexImage() is to decompress the texture, avoid the fallback
path even if prefer_blit_based_texture_transfer = false. For drivers
that returned PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0, we
were always taking the fallback path for texture decompression rather
than rendering a quad. The later is a lot faster.
Cc: "10.0" "10.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5125165dde6ea6c3599810a92d6bcd4a5650adfd
Author: Erik Faye-Lund <kusmabite at gmail.com>
Date: Fri Feb 7 13:45:11 2014 +0100
gallium/tgsi: correct typo propagated from NV_vertex_program1_1
In the specification text of NV_vertex_program1_1, the upper
limit of the RCC instruction is written as 1.884467e+19 in
scientific notation, but as 0x5F800000 in binary. But the binary
version translates to 1.84467e+19 rather than 1.884467e+19 in
scientific notation.
Since the lower-limit equals 2^-64 and the binary version equals
2^+64, let's assume the value in scientific notation is a typo
and implement this using the value from the binary version
instead.
Signed-off-by: Erik Faye-Lund <kusmabite at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a49a796a41fa5ba3dccc2e13de43520b8d05bb6
Author: Erik Faye-Lund <kusmabite at gmail.com>
Date: Fri Feb 7 13:45:10 2014 +0100
gallium/tgsi: use CLAMP instead of open-coded clamps
Signed-off-by: Erik Faye-Lund <kusmabite at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=498d10e230663f8604d00608cae6324f779c9cdd
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:44:05 2014 +0200
egl: Unhide functionality in _eglInitSurface()
_eglInitResource() was used to memset entire _EGLSurface by
writing more than size of pointed target. This does work
as long as Resource is the first element in _EGLSurface,
this patch fixes such dependency.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1456ed85f0ed8b9c9f0abd6bd389a089fa3824b2
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:44:04 2014 +0200
egl: Unhide functionality in _eglInitContext()
_eglInitResource() was used to memset entire _EGLContext by
writing more than size of pointed target. This does work
as long as Resource is the first element in _EGLContext,
this patch fixes such dependency.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d530745169282469b2dd8221629ef948ff31bcf3
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:44:03 2014 +0200
glx: Add missing null check in __glX_send_client_info()
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3e948340be3fe61d3724f1b96651c2097b4026e
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:44:02 2014 +0200
i965: Add missing null check in fs_visitor::dead_code_eliminate_local()
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e503609e6feb9373ec3bba4ff028a66f1517be30
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:44:00 2014 +0200
glx: Add some missing null checks in glx_pbuffer.c
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=88cad8356eadde7b6bc25cc5a0c1762352e5b3f7
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:43:59 2014 +0200
glsl: Fix null access on file read error
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ae1437a8ecf81676012c7a3507a6ed58e7338b2
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:43:58 2014 +0200
glx: Add missing null check in __glXCloseDisplay
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d28e92ff74892be2ce345e33863a172ae29825b6
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Feb 7 14:43:57 2014 +0200
glx: Add missing null checks in glxcmds.c
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=020c43f401e671e80ac90182415cbbed1575dde4
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Sat Jan 25 10:55:22 2014 -0800
main/get: support ARB_gpu_shader5
If a driver enables ARB_gpu_shader5 and sets Const.MaxVertexSteams >= 4,
then piglit's arb_gpu_shader5-minmax test should now pass.
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=60914fa80d77e2104460f8aeeed8b7c34cfa13b2
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Sat Jan 25 10:55:21 2014 -0800
glapi: add definitions for ARB_gpu_shader5
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0befbafb4b60b8d90af6a8e4013fe8d48383227d
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Feb 4 02:53:54 2014 -0500
nouveau/codegen: allow tex offsets on non-TXF instructions (e.g. TXL)
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f76c7ad5b14f5646a56ca3518f0c2e739811f223
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Feb 4 02:30:18 2014 -0500
nv50: only over-allocate by a page for code
The pre-fetching doesn't go too far. Tested with over-allocating by only
a page, and didn't see any errors in dmesg. Saves ~512KB of VRAM.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: 10.1 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=364bdd24197e83bc76b0d244271e57ef4334a859
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Feb 3 23:35:14 2014 -0500
nv50: fix layerid to be the fp input number rather than vp output number
In the tests they were the same so it didn't matter, but indications are
that this is the correct behaviour. Also take this opportunity to
(trivially) support using gl_Layer in fp.
Cc: 10.1 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7373b7dc7202b93eecc1072efda7319b1ad0da8
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Feb 3 23:20:32 2014 -0500
nv50: rework primid logic
Functionally identical but much simpler. Should also better integrate
with future layer/viewport changes/fixes.
Cc: 10.1 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f658150639c36eda351590e757247c56507f494f
Author: Kristian Høgsberg <krh at bitplanet.net>
Date: Wed Feb 5 11:43:58 2014 -0800
glx: Pass NULL DRI drawables into the DRI driver for None GLX drawables
GLX_ARB_create_context allows making a GLX context current with None
drawable and readables, but this was never implemented correctly in GLX.
We would create a __DRIdrawable for the None GLX drawable and pass that
to the DRI driver and that would somehow work. Now it's somehow broken.
The way this should have worked is that we pass a NULL DRI drawable
to the DRI driver when the GLX user calls glXMakeContextCurrent()
with None for drawable and readables.
https://bugs.freedesktop.org/show_bug.cgi?id=74143
Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db54fca9b86aa124447d11d2bdbe359a2742cfd5
Author: Christian König <christian.koenig at amd.com>
Date: Tue Jan 28 15:22:05 2014 +0100
st/vdpau: add flush on unmap
Flush the context when we unmap a buffer, otherwise VDPAU might
start rendering the next frame while we still reference that buffer.
Signed-off-by: Christian König <christian.koenig at amd.com>
Tested-by: StrangeNoises (rachel at strangenoises.org)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f98053fc94a964930c73c43154daddfd7824e7c
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Jan 13 14:13:01 2014 +0100
vdpau: flush the context before exporting the surface v2
Bugzilla (bug needs XBMC changes as well):
https://bugs.freedesktop.org/show_bug.cgi?id=73191
When VL uploads vertex buffers, it uses PIPE_TRANSFER_DONTBLOCK, which always
flushes the context in the winsys if the buffer being mapped is busy. Since
I added handling of DISCARD_RANGE, DONTBLOCK has had no effect when combined
with DISCARD_RANGE and I think the context isn't flushed anywhere else,
so no commands are submitted to the GPU until the IB is full, which takes
a lot of frames.
Using DISCARD_RANGE is not the only way to trigger this bug. The other way
is to reallocate the vertex buffer before every upload.
BTW, I'm not sure if this is the right place for flushing, but it does fix
the bug.
v2 (chk): move the flush to the right place.
Signed-off-by: Christian König <christian.koenig at amd.com>
Tested-by: StrangeNoises (rachel at strangenoises.org)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2ef93cf94ee553e5de70a7c26fd0724d967d0b2
Author: Matt Turner <mattst88 at gmail.com>
Date: Mon Feb 3 11:51:51 2014 -0800
glsl: Initialize ubo_binding_mask flags to zero.
Missed in commit e63bb298. Caused sporadic test failures, like
incorrect-in-layout-qualifier-repeated-prim.geom.
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=559af1df10e1390a49ff7b5ed37b4d44a0fcc9cb
Author: Marek Olšák <marek.olsak at amd.com>
Date: Thu Feb 6 17:43:29 2014 +0100
gallium/radeon: fix warnings
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c32114460dbb7f33885c181a0d7dee07b15b8751
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Feb 3 03:42:17 2014 +0100
gallium: remove PIPE_USAGE_STATIC
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eeb5a4a50e1317a7f8d9e168c962ce3b1d7b36f9
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Feb 3 03:21:29 2014 +0100
gallium: define the behavior of PIPE_USAGE_* flags properly
STATIC will be removed in the following commit.
v2: changed the definition of IMMUTABLE
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed84fb3167aa3a048dedaf7cbd865e306b971d50
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Feb 3 03:20:13 2014 +0100
gallium: remove PIPE_RESOURCE_FLAG_GEN_MIPS
Unused.
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2be5bbdd97e1f830d265042d3f1cdce1a201ea33
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Feb 4 18:35:40 2014 +0100
r600g,radeonsi: set resource domains in one place (v2)
v2: This doesn't change the behavior. It only moves the tiling check
to r600_init_resource and removes the usage parameter.
Reviewed-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6dbcf10dff1f8343a26081f5489ef732ebb5460
Author: Marek Olšák <marek.olsak at amd.com>
Date: Thu Feb 6 02:16:50 2014 +0100
st/mesa: fix crash when a shader uses a TBO and it's not bound
This binds a NULL sampler view in that case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74251
Cc: "10.1" "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b862cc23f203f1fd87edf44a32312491dce8bb91
Author: Christian König <christian.koenig at amd.com>
Date: Tue Jan 28 06:21:14 2014 -0700
st/omx: add workaround for bug in Bellagio
Not blocking for the message thread can lead to accessing freed up memory.
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15e39ca28a1a98ea43729b65eb19e8e4e5e94ebc
Author: Christian König <christian.koenig at amd.com>
Date: Mon Aug 5 11:41:27 2013 -0600
st/omx: initial OpenMAX support v3
Featuring a full grown MPEG2 and H264 decoder and a couple of hundred bugs.
v2 (Leo): fix an error for pic_order_cnt_type 1
v3 (Leo): implement support for field decoding
Signed-off-by: Christian König <christian.koenig at amd.com>
Signed-off-by: Leo Liu <leo.liu at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9b941ff1b9633d02c61ada969726a5c0a9944c6
Author: Christian König <christian.koenig at amd.com>
Date: Tue Sep 17 08:20:32 2013 -0600
vl/rbsp: add H.264 RBSP implementation
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8b28bf94abf76b2708be797d15206ec9804eb2b
Author: Christian König <christian.koenig at amd.com>
Date: Tue Sep 17 07:27:38 2013 -0600
vl/vlc: add function to limit the vlc size
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ef42a54a7480272fb3bbedd11c84a8b77dae41f
Author: Christian König <christian.koenig at amd.com>
Date: Tue Sep 17 07:22:34 2013 -0600
vl/vlc: add remove bits function
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe0f9ab056c938451bf742e334f49df4d72f0856
Author: Christian König <christian.koenig at amd.com>
Date: Mon Feb 3 10:12:43 2014 -0700
radeon: update legal notes on UVD
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96e8b916a7a39a9ba58e92d1ad77b5501de63ac7
Author: Christian König <christian.koenig at amd.com>
Date: Mon Jan 27 03:40:25 2014 -0700
radeon: just don't map VRAM buffers at all
Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b218dcdd7877b81d8b6c55799b6ec33e1cc8079
Author: Christian König <christian.koenig at amd.com>
Date: Tue Jan 21 11:49:06 2014 -0700
radeon/video: directly create buffers in the right domain
Avoid moving things around on start of stream.
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bcfb0bc8ffed0db244cf0b3d4e200add590a02a
Author: Christian König <christian.koenig at amd.com>
Date: Thu Oct 17 06:21:40 2013 -0600
radeon/video: seperate common video functions
Signed-off-by: Christian König <christian.koenig at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57f94bff71877d45cde6d6dd283972084adb5df2
Author: Axel Davy <axel.davy at ens.fr>
Date: Thu Jan 30 16:10:54 2014 +0100
gallium/dri2: Fix dri2_dup_image
dri2_dup_image was not copying the dri_format field.
This was causing some bugs, for example:
. we create an gbm_bo.
. we get an EGLImage from the gbm_bo.
. Bug: impossible to get again the gbm_bo from the EGLImage by
importing. (gbm dri2 backend)
Signed-off-by: Axel Davy <axel.davy at ens.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bba1105d52efdf26b9cdf4e389f68d928e5ca3b2
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sat Jan 25 19:51:50 2014 +1300
i965/vs: Fix typo in brw_compute_vue_map
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e57d77280efcbfd6579a88f071426653287ef833
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Feb 5 13:27:15 2014 -0800
i965: Fix register types in dump_instructions().
This regressed when I converted BRW_REGISTER_TYPE_* to be an abstract
type that doesn't match the hardware description. dump_instruction()
was using reg_encoding[] from brw_disasm.c, which no longer matches
(and was incorrect for Gen8+ anyway).
This patch introduces a new function to convert the abstract enum values
into the letter suffix we expect.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reported-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1340e24406fbdfdbfb49dc19d7d5d72d6e363631
Author: Chad Versace <chad.versace at linux.intel.com>
Date: Tue Jan 7 12:08:30 2014 -0800
egl/glx: Remove egl_glx driver
Mesa now has a real, feature-rich EGL implementation on X11 via xcb.
Therefore I believe there is no longer a practical need for the egl_glx
driver.
Furthermore, egl_glx appears to be unmaintained. The most recent
nontrivial commit to egl_glx was 6baa5f1 on 2011-11-25.
Tested by running weston-smoke in windowed Weston on X with i965.
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Kristian Høgsberg <krh at bitplanet.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0224bd20f391e8e26637380bb50187ba2fb51ee4
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Feb 6 01:03:09 2014 +0000
docs: update 10.1 relnotes to note GL 3.3 on r600 and radeonsi.
Signed-off-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a3c99082388f42efac534a4b1d6e211c7cb2806
Author: Zack Rusin <zackr at vmware.com>
Date: Tue Feb 4 19:33:12 2014 -0500
tgsi/ureg: increase the number of immediates
ureg_program is allocated on the heap so we can just bump the
number of immediates that it can handle. It's needed for d3d10.
Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=efb152dd04ad3debfbb510b68a905a5ccb805fbe
Author: Zack Rusin <zackr at vmware.com>
Date: Tue Feb 4 19:32:04 2014 -0500
gallivm: make sure analysis works with large number of immediates
We need to handle a lot more immediates and in order to do that
we also switch from allocating this structure on the stack to
allocating it on the heap.
Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=69ee3f431f9f1bb782485ede992b95e01ad790a5
Author: Zack Rusin <zackr at vmware.com>
Date: Tue Feb 4 19:28:58 2014 -0500
gallivm: handle huge number of immediates
We only supported up to 256 immediates, which isn't enough. We had
code which was allocating immediates as an allocated array, but it
was always used along a statically backed array for performance
reasons. This commit adds code to skip that performance optimization
and always use just the dynamically allocated immediates if the
number of them is too great.
Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8507afc97fa3323c89ee4cd1359d2fa61015bcd0
Author: Zack Rusin <zackr at vmware.com>
Date: Mon Feb 3 21:40:24 2014 -0500
gallivm: allow large numbers of temporaries
The number of allowed temporaries increases almost with every
iteration of an api. We used to support 128, then we started
increasing and the newer api's support 4096+. So if we notice
that the number of temporaries is larger than our statically
allocated storage would allow we just treat them as indexable
temporaries and allocate them as an array from the start.
Signed-off-by: Zack Rusin <zackr at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5eeb12c0bcd3d25fee9749d797f8541a96935192
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Jan 26 11:04:42 2014 +1300
i965/fs: Assume FBO rendering in precompile if MRT.
If multiple color outputs are written, this shader is unlikely to be
useful with a winsys framebuffer.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=046f8d8a6fcae641ed0e7e06e24ab5da39a57c86
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Jan 26 11:03:33 2014 +1300
i965/fs: Guess nr_color_regions better in precompile
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c9de691c71c07adebb11c24864d9e6d2a6207e3
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Thu Feb 6 10:17:17 2014 +1300
docs: Add relnotes for 10.2
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87e916a240ad7f9369b58c2438188e89a8af66cf
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Thu Feb 6 10:14:40 2014 +1300
mesa: Bump version to 10.2.0-devel
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44338cd826623ae0675861015a56c528261f3fd3
Author: Kristian Høgsberg <krh at bitplanet.net>
Date: Wed Feb 5 10:59:02 2014 -0800
i965: Move intel_prepare_render() above first buffer access
The driver is supposed to ensure buffers before any drawing operation, but in
do_blit_drawpixels() and do_blit_copypixels() we inspect the buffer format
before calling intel_prepare_render(). That was covered up by the
unconditional call to intel_prepare_render() in intelMakeCurrent(), but we
now only do this on the initial intelMakeCurrent call for a context
(to get the size for the initial viewport values).
https://bugs.freedesktop.org/show_bug.cgi?id=74083
Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
Tested-by: Alexander Monakov <amonakov at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db98d238e237f19c3d1bc201e748ed5bf289ba6b
Author: Brian Paul <brianp at vmware.com>
Date: Wed Feb 5 10:45:14 2014 -0700
st/mesa: add MESA_SHADER_COMPUTE case in shader_stage_to_ptarget()
Silences compiler warning. Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=357faa5a361db7683b61343bd0039ffc1a752443
Author: Brian Paul <brianp at vmware.com>
Date: Tue Feb 4 12:19:42 2014 -0700
mesa: re-wrap, fix-up comment text in formats.h
Wrap to 78 columns, fix comment formatting.
Trivial.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=25268b930dbd9bc89c0cce83746c5ca2f534c016
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 15:12:05 2014 -0800
i965/cs: Allow ARB_compute_shader to be enabled via env var.
This will allow testing of compute shader functionality before it is
completed.
To enable ARB_compute_shader functionality in the i965 driver, set
INTEL_COMPUTE_SHADER=1.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bbf93045a494e676f3f79d278701f55a9a41e7a
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 15:51:13 2014 -0800
i965/cs: Create the brw_compute_program struct, and the code to initialize it.
v2: Fix comment.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fe274b3d7a8e70dc605e6076d29e00add292508
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 11:40:23 2014 -0800
glsl/cs: Prohibit mixing of compute and non-compute shaders.
Fixes piglit test:
spec/ARB_compute_shader/linker/mix_compute_and_non_compute
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a79bdab3008a19a770b8b84fdf5582e72db72c9
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 01:54:26 2014 -0800
glsl/cs: Prohibit user-defined ins/outs in compute shaders.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5c5438e1fb9b5b1e83c7081da518d9943fc82e8
Author: Paul Berry <stereotype441 at gmail.com>
Date: Thu Jan 9 04:03:30 2014 -0800
main/cs: Implement query for COMPUTE_WORK_GROUP_SIZE.
v2: Improve error message.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28ce604b7f2b08b967b6a27051ecab04adaed575
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 11:59:28 2014 -0800
mesa/cs: Handle compute shader local size during linking.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fa74e848fd11c71bb70ea0a69650944e4f07571
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 09:09:31 2014 -0800
glsl/cs: Handle compute shader local_size_{x,y,z} declaration.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0398b69954eb8e73e9ae663ce200170ff70d216d
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 01:42:58 2014 -0800
mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_COUNT constant.
v2: Document that the 3-element array MaxComputeWorkGroupCount is
indexed by dimension.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c85c50997f073993b86c694dda7c18bbaca30bbf
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 15:11:40 2014 -0800
mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_INVOCATIONS constant.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
v2: Use CONTEXT_INT rather than CONTEXT_ENUM.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=347dde82e65663562d6d2930bf861ec8c8079362
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 13:31:58 2014 -0800
mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_SIZE constant.
v2: Document that the 3-element array MaxComputeWorkGroupSize is
indexed by dimension.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47d480e3e4850ef8934775570444feea503295d7
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 15:50:39 2014 -0800
mesa/cs: Create the gl_compute_program struct, and the code to initialize it.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b34ae2e64fd29fd4cd1cf18f7dd09116e02dc96
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 09:00:02 2014 -0800
mesa/cs: Handle compute shaders in _mesa_use_program().
v2: do cs after the ordered pipeline stages for consistency.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c15064c1691764e858d05065f10007aceec9a7ac
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 09:00:02 2014 -0800
glsl/cs: update main.cpp to use the ".comp" extension for compute shaders.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d861c2963a0b939709981f39e8268822489db86f
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 20:06:05 2014 -0800
glsl/cs: Populate default values for ctx->Const.Program[MESA_SHADER_COMPUTE].
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c61ec8d8e34e9bf30b3c4c84afa08f0a5b66b932
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 20:06:05 2014 -0800
mesa/cs: Add a MESA_SHADER_COMPUTE stage and update switch statements.
This patch adds MESA_SHADER_COMPUTE to the gl_shader_stage enum.
Also, where it is trivial to do so, it adds a compute shader case to
switch statements that switch based on the type of shader. This
avoids "unhandled switch case" compiler warnings.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28e526d5580739e8b4098cd08c644b9157fdc94c
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 19:47:25 2014 -0800
glsl/cs: Change some linker loops to use MESA_SHADER_FRAGMENT as a bound.
Linker loops that iterate through all the stages in the pipeline need
to use MESA_SHADER_FRAGMENT as a bound, so that we can add an
additional MESA_SHADER_COMPUTE stage, without it being erroneously
included in the pipeline.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=79134cb51609724cc4d94ade12dc52a09e2e91db
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 15:08:04 2014 -0800
mesa/cs: Add dispatch API stubs for ARB_compute_shader.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7d05a58ae3655730f84c9786439e2461cdb77da
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Jan 6 09:09:07 2014 -0800
mesa/cs: Add extension enable flags for ARB_compute_shader.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a7da3bec5961bd82c520e1f5e363cbd2fa8fb77
Author: Roland Scheidegger <sroland at vmware.com>
Date: Tue Feb 4 19:53:53 2014 +0100
gallivm: fix F2U opcode
Previously, we were really doing F2I. And also move it to generic section.
(Note that for llvmpipe the code generated is definitely bad, due to lack
of unsigned conversions with sse. I think though what llvm does (using scalar
conversions to 64bit signed either with x87 fpu (32bit) or sse (64bit)
including lots of domain changes is quite suboptimal, could do something like
is_large = arg >= 2^31
half_arg = 0.5 * arg
small_c = fptoint(arg)
large_c = fptoint(half_arg) << 1
res = select(is_large, large_c, small_c)
which should be much less instructions but that's something llvm should do
itself.)
This fixes piglit fs/vs-float-uint-conversion.shader_test (maybe more, needs
GL 3.0 version override to run.)
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
Reviewed-by: Zack Rusin <zackr at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c975966dcaaa4e781f3baba0fc1e3b7ad4a18a6
Author: José Fonseca <jfonseca at vmware.com>
Date: Fri Jan 31 16:44:39 2014 +0000
tools/trace: Handle index buffer overflow gracefully.
Trivial.
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