Mesa (10.1): mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.

Ian Romanick idr at kemper.freedesktop.org
Mon Feb 10 16:54:44 UTC 2014


Module: Mesa
Branch: 10.1
Commit: 62a358892f36b479e0992957a16f1e7c52bce8e2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=62a358892f36b479e0992957a16f1e7c52bce8e2

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Feb  7 21:53:18 2014 -0800

mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.

In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally
renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and
MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their
sense.  The commit message was correct, but what sed commands actually
got run didn't match that.

This patch swaps the two enum names, reversing them.  This should undo
the damage, but might break things if people have manually fixed a few
instances in the meantime...

Mark's commit also failed to mention renames:
s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g
s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g
but those seem okay.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit a487ef87fe4aa8c4b8e5c0d888bfb18727c8e570)

---

 src/mesa/drivers/dri/i915/i830_vtbl.c           |    8 ++++----
 src/mesa/drivers/dri/i915/i915_context.c        |    2 +-
 src/mesa/drivers/dri/i915/i915_texstate.c       |    2 +-
 src/mesa/drivers/dri/i915/i915_vtbl.c           |    8 ++++----
 src/mesa/drivers/dri/i915/intel_fbo.c           |    2 +-
 src/mesa/drivers/dri/i915/intel_screen.c        |    2 +-
 src/mesa/drivers/dri/i965/brw_blorp.cpp         |    4 ++--
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp    |    6 +++---
 src/mesa/drivers/dri/i965/brw_clear.c           |    2 +-
 src/mesa/drivers/dri/i965/brw_misc_state.c      |    6 +++---
 src/mesa/drivers/dri/i965/brw_surface_formats.c |   12 ++++++------
 src/mesa/drivers/dri/i965/intel_fbo.c           |    2 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c   |    8 ++++----
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h   |    4 ++--
 src/mesa/drivers/dri/i965/intel_screen.c        |    4 ++--
 src/mesa/drivers/dri/nouveau/nv04_surface.c     |    8 ++++----
 src/mesa/drivers/dri/radeon/radeon_fbo.c        |   10 +++++-----
 src/mesa/drivers/dri/radeon/radeon_screen.c     |    4 ++--
 src/mesa/drivers/dri/radeon/radeon_texture.c    |    4 ++--
 src/mesa/main/format_pack.c                     |   22 +++++++++++-----------
 src/mesa/main/format_unpack.c                   |   12 ++++++------
 src/mesa/main/formats.c                         |   16 ++++++++--------
 src/mesa/main/formats.h                         |    4 ++--
 src/mesa/main/readpix.c                         |    2 +-
 src/mesa/main/texformat.c                       |    6 +++---
 src/mesa/main/texstore.c                        |    8 ++++----
 src/mesa/state_tracker/st_format.c              |    8 ++++----
 src/mesa/swrast/s_depth.c                       |   14 +++++++-------
 src/mesa/swrast/s_drawpix.c                     |    4 ++--
 src/mesa/swrast/s_renderbuffer.c                |    2 +-
 src/mesa/swrast/s_stencil.c                     |    2 +-
 src/mesa/swrast/s_texfetch.c                    |    4 ++--
 src/mesa/swrast/s_texfetch_tmp.h                |    4 ++--
 33 files changed, 103 insertions(+), 103 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 0d3e3e2..53d408b 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -595,8 +595,8 @@ i830_render_target_supported(struct intel_context *intel,
 {
    mesa_format format = rb->Format;
 
-   if (format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
-       format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+   if (format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+       format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
        format == MESA_FORMAT_Z_UNORM16) {
       return true;
    }
@@ -804,7 +804,7 @@ i830_update_draw_buffer(struct intel_context *intel)
 
    /* Check for stencil fallback. */
    if (irbStencil && irbStencil->mt) {
-      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT);
+      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
    } else if (irbStencil && !irbStencil->mt) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
@@ -817,7 +817,7 @@ i830_update_draw_buffer(struct intel_context *intel)
     * we still need to set up the shared depth/stencil state so we can use it.
     */
    if (depthRegion == NULL && irbStencil && irbStencil->mt
-       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) {
+       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT) {
       depthRegion = irbStencil->mt->region;
    }
 
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index 4cf6acc34..7378fc3 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -114,8 +114,8 @@ intel_init_texture_formats(struct gl_context *ctx)
    ctx->TextureFormatSupported[MESA_FORMAT_L8A8_UNORM] = true;
 
    /* Depth and stencil */
-   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
 
    /*
     * This was disabled in initial FBO enabling to avoid combinations
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 4f4b693..70530e5 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -88,8 +88,8 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode)
    case MESA_FORMAT_RGBA_DXT5:
    case MESA_FORMAT_SRGBA_DXT5:
       return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       if (DepthMode == GL_ALPHA)
 	 return (MAPSURF_32BIT | MT_32BIT_x8A24);
       else if (DepthMode == GL_INTENSITY)
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 0ab616c..74173d4 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -562,8 +562,8 @@ i915_render_target_supported(struct intel_context *intel,
 {
    mesa_format format = rb->Format;
 
-   if (format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
-       format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+   if (format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+       format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
        format == MESA_FORMAT_Z_UNORM16) {
       return true;
    }
@@ -777,7 +777,7 @@ i915_update_draw_buffer(struct intel_context *intel)
 
    /* Check for stencil fallback. */
    if (irbStencil && irbStencil->mt) {
-      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT);
+      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
    } else if (irbStencil && !irbStencil->mt) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
@@ -790,7 +790,7 @@ i915_update_draw_buffer(struct intel_context *intel)
     * we still need to set up the shared depth/stencil state so we can use it.
     */
    if (depthRegion == NULL && irbStencil && irbStencil->mt
-       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) {
+       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT) {
       depthRegion = irbStencil->mt->region;
    }
 
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c
index 161a1d6..a806a42 100644
--- a/src/mesa/drivers/dri/i915/intel_fbo.c
+++ b/src/mesa/drivers/dri/i915/intel_fbo.c
@@ -194,7 +194,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* These aren't actual texture formats, so force them here. */
-      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
+      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
       break;
    }
 
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index b34c815..296df16 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -889,7 +889,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
        * Use combined depth/stencil. Note that the renderbuffer is
        * attached to two attachment points.
        */
-      rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT);
+      rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT);
       _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
       _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
    }
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 9fc410c..76537c8 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -95,7 +95,7 @@ brw_blorp_surface_info::set(struct brw_context *brw,
       this->map_stencil_as_y_tiled = true;
       this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM;
       break;
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       /* It would make sense to use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS
        * here, but unfortunately it isn't supported as a render target, which
        * would prevent us from blitting to 24-bit depth.
@@ -328,7 +328,7 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
    switch (mt->format) {
    case MESA_FORMAT_Z_UNORM16:       depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
    case MESA_FORMAT_Z_FLOAT32: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break;
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:    depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:    depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
    default:                    assert(0); break;
    }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 08cba13..c23504f 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -219,7 +219,7 @@ formats_match(GLbitfield buffer_bit, struct intel_renderbuffer *src_irb,
 {
    /* Note: don't just check gl_renderbuffer::Format, because in some cases
     * multiple gl_formats resolve to the same native type in the miptree (for
-    * example MESA_FORMAT_Z24_UNORM_S8_UINT and MESA_FORMAT_Z24_UNORM_X8_UINT), and we can blit
+    * example MESA_FORMAT_Z24_UNORM_X8_UINT and MESA_FORMAT_Z24_UNORM_S8_UINT), and we can blit
     * between those formats.
     */
    mesa_format src_format = find_miptree(buffer_bit, src_irb)->format;
@@ -368,8 +368,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
     * we have to lie about the surface format.  See the comments in
     * brw_blorp_surface_info::set().
     */
-   if ((src_mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT) !=
-       (dst_mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT)) {
+   if ((src_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) !=
+       (dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT)) {
       return false;
    }
 
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index 953e9ba..1c7ebdb 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -130,7 +130,7 @@ brw_fast_clear_depth(struct gl_context *ctx)
    uint32_t depth_clear_value;
    switch (mt->format) {
    case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
        *
        *     "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index cb2447f..ca88b94 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -142,7 +142,7 @@ brw_depthbuffer_format(struct brw_context *brw)
    if (!drb &&
        (srb = intel_get_renderbuffer(fb, BUFFER_STENCIL)) &&
        !srb->mt->stencil_mt &&
-       (intel_rb_format(srb) == MESA_FORMAT_Z24_UNORM_X8_UINT ||
+       (intel_rb_format(srb) == MESA_FORMAT_Z24_UNORM_S8_UINT ||
 	intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_S8X24_UINT)) {
       drb = srb;
    }
@@ -155,7 +155,7 @@ brw_depthbuffer_format(struct brw_context *brw)
       return BRW_DEPTHFORMAT_D16_UNORM;
    case MESA_FORMAT_Z_FLOAT32:
       return BRW_DEPTHFORMAT_D32_FLOAT;
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       if (brw->gen >= 6) {
 	 return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
       } else {
@@ -173,7 +173,7 @@ brw_depthbuffer_format(struct brw_context *brw)
 	  */
 	 return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
       }
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
    case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
       return BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT;
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 2f40631..6a7e00a 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -358,9 +358,9 @@ brw_format_for_mesa_format(mesa_format mesa_format)
       [MESA_FORMAT_G16R16_UNORM] = 0,
       [MESA_FORMAT_B10G10R10A2_UNORM] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM,
       [MESA_FORMAT_S8_UINT_Z24_UNORM] = 0,
-      [MESA_FORMAT_Z24_UNORM_X8_UINT] = 0,
-      [MESA_FORMAT_Z_UNORM16] = 0,
       [MESA_FORMAT_Z24_UNORM_S8_UINT] = 0,
+      [MESA_FORMAT_Z_UNORM16] = 0,
+      [MESA_FORMAT_Z24_UNORM_X8_UINT] = 0,
       [MESA_FORMAT_X8Z24_UNORM] = 0,
       [MESA_FORMAT_Z_UNORM32] = 0,
       [MESA_FORMAT_S_UINT8] = 0,
@@ -600,8 +600,8 @@ brw_init_surface_formats(struct brw_context *brw)
    /* We will check this table for FBO completeness, but the surface format
     * table above only covered color rendering.
     */
-   brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
    brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
+   brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
    brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true;
    brw->format_supported_as_render_target[MESA_FORMAT_Z_UNORM16] = true;
    brw->format_supported_as_render_target[MESA_FORMAT_Z_FLOAT32] = true;
@@ -610,8 +610,8 @@ brw_init_surface_formats(struct brw_context *brw)
    /* We remap depth formats to a supported texturing format in
     * translate_tex_format().
     */
-   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_Z_FLOAT32] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true;
 
@@ -697,8 +697,8 @@ translate_tex_format(struct brw_context *brw,
    case MESA_FORMAT_Z_UNORM16:
       return BRW_SURFACEFORMAT_R16_UNORM;
 
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       return BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS;
 
    case MESA_FORMAT_Z_FLOAT32:
@@ -740,8 +740,8 @@ brw_is_hiz_depth_format(struct brw_context *brw, mesa_format format)
    switch (format) {
    case MESA_FORMAT_Z_FLOAT32:
    case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
    case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
    case MESA_FORMAT_Z_UNORM16:
       return true;
    default:
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index d99f9a6..acb5d72 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -209,7 +209,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
 	 rb->Format = MESA_FORMAT_S_UINT8;
       } else {
 	 assert(!brw->must_use_separate_stencil);
-	 rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
+	 rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
       }
       break;
    }
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 5a60637..8f1b163 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -370,8 +370,8 @@ intel_miptree_create_layout(struct brw_context *brw,
       /* Fix up the Z miptree format for how we're splitting out separate
        * stencil.  Gen7 expects there to be no stencil bits in its depth buffer.
        */
-      if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) {
-	 mt->format = MESA_FORMAT_Z24_UNORM_S8_UINT;
+      if (mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
+	 mt->format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       } else if (mt->format == MESA_FORMAT_Z32_FLOAT_S8X24_UINT) {
 	 mt->format = MESA_FORMAT_Z_FLOAT32;
 	 mt->cpp = 4;
@@ -918,8 +918,8 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
    assert(target_to_target(image->TexObject->Target) == mt->target);
 
    mesa_format mt_format = mt->format;
-   if (mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT && mt->stencil_mt)
-      mt_format = MESA_FORMAT_Z24_UNORM_X8_UINT;
+   if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT && mt->stencil_mt)
+      mt_format = MESA_FORMAT_Z24_UNORM_S8_UINT;
    if (mt->format == MESA_FORMAT_Z_FLOAT32 && mt->stencil_mt)
       mt_format = MESA_FORMAT_Z32_FLOAT_S8X24_UINT;
    if (mt->etc_format != MESA_FORMAT_NONE)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 775730c..0c0a3d3 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -279,8 +279,8 @@ struct intel_mipmap_tree
     * on hardware where we want or need to use separate stencil, there will be
     * two miptrees for storing the data.  If the depthstencil texture or rb is
     * MESA_FORMAT_Z32_FLOAT_S8X24_UINT, then mt->format will be
-    * MESA_FORMAT_Z_FLOAT32, otherwise for MESA_FORMAT_Z24_UNORM_X8_UINT objects it will be
-    * MESA_FORMAT_Z24_UNORM_S8_UINT.
+    * MESA_FORMAT_Z_FLOAT32, otherwise for MESA_FORMAT_Z24_UNORM_S8_UINT objects it will be
+    * MESA_FORMAT_Z24_UNORM_X8_UINT.
     *
     * For ETC1/ETC2 textures, this is one of the uncompressed mesa texture
     * formats if the hardware lacks support for ETC1/ETC2. See @ref wraps_etc.
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index b2bd47c..6ab3609 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1007,7 +1007,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
       assert(mesaVis->stencilBits == 8);
 
       if (screen->devinfo->has_hiz_and_separate_stencil) {
-         rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT,
+         rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
                                                 num_samples);
          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
          rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8,
@@ -1018,7 +1018,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
           * Use combined depth/stencil. Note that the renderbuffer is
           * attached to two attachment points.
           */
-         rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
+         rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT,
                                                 num_samples);
          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
diff --git a/src/mesa/drivers/dri/nouveau/nv04_surface.c b/src/mesa/drivers/dri/nouveau/nv04_surface.c
index f2fc83e..968c05f 100644
--- a/src/mesa/drivers/dri/nouveau/nv04_surface.c
+++ b/src/mesa/drivers/dri/nouveau/nv04_surface.c
@@ -62,7 +62,7 @@ swzsurf_format(mesa_format format)
 	case MESA_FORMAT_B8G8R8X8_UNORM:
 	case MESA_FORMAT_B8G8R8A8_UNORM:
 	case MESA_FORMAT_A8R8G8B8_UNORM:
-	case MESA_FORMAT_Z24_UNORM_X8_UINT:
+	case MESA_FORMAT_Z24_UNORM_S8_UINT:
 	case MESA_FORMAT_S8_UINT_Z24_UNORM:
 	case MESA_FORMAT_Z_UNORM32:
 		return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8;
@@ -101,7 +101,7 @@ surf2d_format(mesa_format format)
 	case MESA_FORMAT_B8G8R8X8_UNORM:
 	case MESA_FORMAT_B8G8R8A8_UNORM:
 	case MESA_FORMAT_A8R8G8B8_UNORM:
-	case MESA_FORMAT_Z24_UNORM_X8_UINT:
+	case MESA_FORMAT_Z24_UNORM_S8_UINT:
 	case MESA_FORMAT_S8_UINT_Z24_UNORM:
 	case MESA_FORMAT_Z_UNORM32:
 		return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
@@ -140,7 +140,7 @@ rect_format(mesa_format format)
 	case MESA_FORMAT_B8G8R8X8_UNORM:
 	case MESA_FORMAT_B8G8R8A8_UNORM:
 	case MESA_FORMAT_A8R8G8B8_UNORM:
-	case MESA_FORMAT_Z24_UNORM_X8_UINT:
+	case MESA_FORMAT_Z24_UNORM_S8_UINT:
 	case MESA_FORMAT_S8_UINT_Z24_UNORM:
 	case MESA_FORMAT_Z_UNORM32:
 		return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
@@ -179,7 +179,7 @@ sifm_format(mesa_format format)
 	case MESA_FORMAT_B8G8R8X8_UNORM:
 	case MESA_FORMAT_B8G8R8A8_UNORM:
 	case MESA_FORMAT_A8R8G8B8_UNORM:
-	case MESA_FORMAT_Z24_UNORM_X8_UINT:
+	case MESA_FORMAT_Z24_UNORM_S8_UINT:
 	case MESA_FORMAT_S8_UINT_Z24_UNORM:
 	case MESA_FORMAT_Z_UNORM32:
 		return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 3d1bef3..537ab49 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -310,7 +310,7 @@ radeon_map_renderbuffer(struct gl_context *ctx,
    }
 
    if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) {
-       if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
+       if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) {
 	   radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h,
 					 mode, out_map, out_stride);
 	   return;
@@ -419,7 +419,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx,
    GLboolean ok;
 
    if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) {
-       if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
+       if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) {
 	   radeon_unmap_renderbuffer_s8z24(ctx, rb);
 	   return;
        }
@@ -507,7 +507,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* alloc a depth+stencil buffer */
-      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
+      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
       cpp = 4;
       break;
    case GL_DEPTH_COMPONENT16:
@@ -517,12 +517,12 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe
    case GL_DEPTH_COMPONENT:
    case GL_DEPTH_COMPONENT24:
    case GL_DEPTH_COMPONENT32:
-      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
+      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       cpp = 4;
       break;
    case GL_DEPTH_STENCIL_EXT:
    case GL_DEPTH24_STENCIL8_EXT:
-      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
+      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
       cpp = 4;
       break;
    default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index eb5df2c..57e866e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -632,14 +632,14 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
     if (mesaVis->depthBits == 24) {
       if (mesaVis->stencilBits == 8) {
 	struct radeon_renderbuffer *depthStencilRb =
-           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
+           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 	depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
 	/* depth renderbuffer */
 	struct radeon_renderbuffer *depth =
-           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
+           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 	depth->has_surface = screen->depthHasSurface;
       }
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index acc4e8c..5bf6541 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -433,7 +433,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
 	case GL_DEPTH_COMPONENT32:
 	case GL_DEPTH_STENCIL_EXT:
 	case GL_DEPTH24_STENCIL8_EXT:
-		return MESA_FORMAT_Z24_UNORM_X8_UINT;
+		return MESA_FORMAT_Z24_UNORM_S8_UINT;
 
 	/* EXT_texture_sRGB */
 	case GL_SRGB:
@@ -513,7 +513,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format)
 	switch (mesa_format)
 	{
 		case MESA_FORMAT_Z_UNORM16:
-		case MESA_FORMAT_Z24_UNORM_X8_UINT:
+		case MESA_FORMAT_Z24_UNORM_S8_UINT:
 			return 1;
 		default:
 			return 0;
diff --git a/src/mesa/main/format_pack.c b/src/mesa/main/format_pack.c
index dee253c..2772ff2 100644
--- a/src/mesa/main/format_pack.c
+++ b/src/mesa/main/format_pack.c
@@ -1936,9 +1936,9 @@ _mesa_get_pack_ubyte_rgba_function(mesa_format format)
 
       /* should never convert RGBA to these formats */
       table[MESA_FORMAT_S8_UINT_Z24_UNORM] = NULL;
-      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = NULL;
-      table[MESA_FORMAT_Z_UNORM16] = NULL;
       table[MESA_FORMAT_Z24_UNORM_S8_UINT] = NULL;
+      table[MESA_FORMAT_Z_UNORM16] = NULL;
+      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = NULL;
       table[MESA_FORMAT_X8Z24_UNORM] = NULL;
       table[MESA_FORMAT_Z_UNORM32] = NULL;
       table[MESA_FORMAT_S_UINT8] = NULL;
@@ -2099,9 +2099,9 @@ _mesa_get_pack_float_rgba_function(mesa_format format)
 
       /* should never convert RGBA to these formats */
       table[MESA_FORMAT_S8_UINT_Z24_UNORM] = NULL;
-      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = NULL;
-      table[MESA_FORMAT_Z_UNORM16] = NULL;
       table[MESA_FORMAT_Z24_UNORM_S8_UINT] = NULL;
+      table[MESA_FORMAT_Z_UNORM16] = NULL;
+      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = NULL;
       table[MESA_FORMAT_X8Z24_UNORM] = NULL;
       table[MESA_FORMAT_Z_UNORM32] = NULL;
       table[MESA_FORMAT_S_UINT8] = NULL;
@@ -2433,8 +2433,8 @@ _mesa_get_pack_float_z_func(mesa_format format)
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
    case MESA_FORMAT_X8Z24_UNORM:
       return pack_float_z_Z24_S8;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       return pack_float_z_S8_Z24;
    case MESA_FORMAT_Z_UNORM16:
       return pack_float_z_Z16;
@@ -2518,8 +2518,8 @@ _mesa_get_pack_uint_z_func(mesa_format format)
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
    case MESA_FORMAT_X8Z24_UNORM:
       return pack_uint_z_Z24_S8;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       return pack_uint_z_S8_Z24;
    case MESA_FORMAT_Z_UNORM16:
       return pack_uint_z_Z16;
@@ -2581,7 +2581,7 @@ _mesa_get_pack_ubyte_stencil_func(mesa_format format)
    switch (format) {
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       return pack_ubyte_stencil_Z24_S8;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       return pack_ubyte_stencil_S8_Z24;
    case MESA_FORMAT_S_UINT8:
       return pack_ubyte_stencil_S8;
@@ -2616,8 +2616,8 @@ _mesa_pack_float_z_row(mesa_format format, GLuint n,
          }
       }
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       {
          /* don't disturb the stencil values */
          GLuint *d = ((GLuint *) dst);
@@ -2690,8 +2690,8 @@ _mesa_pack_uint_z_row(mesa_format format, GLuint n,
          }
       }
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       {
          /* don't disturb the stencil values */
          GLuint *d = ((GLuint *) dst);
@@ -2762,7 +2762,7 @@ _mesa_pack_ubyte_stencil_row(mesa_format format, GLuint n,
          }
       }
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       {
          /* don't disturb the Z values */
          GLuint *d = ((GLuint *) dst);
@@ -2803,7 +2803,7 @@ _mesa_pack_uint_24_8_depth_stencil_row(mesa_format format, GLuint n,
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       memcpy(dst, src, n * sizeof(GLuint));
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       {
          GLuint *d = ((GLuint *) dst);
          GLuint i;
diff --git a/src/mesa/main/format_unpack.c b/src/mesa/main/format_unpack.c
index 02ad00a..c948a9d 100644
--- a/src/mesa/main/format_unpack.c
+++ b/src/mesa/main/format_unpack.c
@@ -2366,9 +2366,9 @@ get_unpack_rgba_function(mesa_format format)
       table[MESA_FORMAT_B10G10R10A2_UINT] = unpack_ARGB2101010_UINT;
       table[MESA_FORMAT_R10G10B10A2_UINT] = unpack_ABGR2101010_UINT;
       table[MESA_FORMAT_S8_UINT_Z24_UNORM] = unpack_Z24_S8;
-      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = unpack_S8_Z24;
+      table[MESA_FORMAT_Z24_UNORM_S8_UINT] = unpack_S8_Z24;
       table[MESA_FORMAT_Z_UNORM16] = unpack_Z16;
-      table[MESA_FORMAT_Z24_UNORM_S8_UINT] = unpack_X8_Z24;
+      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = unpack_X8_Z24;
       table[MESA_FORMAT_X8Z24_UNORM] = unpack_Z24_X8;
       table[MESA_FORMAT_Z_UNORM32] = unpack_Z32;
       table[MESA_FORMAT_S_UINT8] = unpack_S8;
@@ -3986,8 +3986,8 @@ _mesa_unpack_float_z_row(mesa_format format, GLuint n,
    case MESA_FORMAT_X8Z24_UNORM:
       unpack = unpack_float_z_Z24_X8;
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       unpack = unpack_float_z_X8_Z24;
       break;
    case MESA_FORMAT_Z_UNORM16:
@@ -4091,8 +4091,8 @@ _mesa_unpack_uint_z_row(mesa_format format, GLuint n,
    case MESA_FORMAT_X8Z24_UNORM:
       unpack = unpack_uint_z_Z24_X8;
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       unpack = unpack_uint_z_X8_Z24;
       break;
    case MESA_FORMAT_Z_UNORM16:
@@ -4164,7 +4164,7 @@ _mesa_unpack_ubyte_stencil_row(mesa_format format, GLuint n,
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       unpack_ubyte_s_Z24_S8(src, dst, n);
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       unpack_ubyte_s_S8_Z24(src, dst, n);
       break;
    case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
@@ -4202,7 +4202,7 @@ _mesa_unpack_uint_24_8_depth_stencil_row(mesa_format format, GLuint n,
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       unpack_uint_24_8_depth_stencil_Z24_S8(src, dst, n);
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       unpack_uint_24_8_depth_stencil_S8_Z24(src, dst, n);
       break;
    default:
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index 10731d5..f6c399e 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -439,8 +439,8 @@ static struct gl_format_info format_info[MESA_FORMAT_COUNT] =
       1, 1, 4                      /* BlockWidth/Height,Bytes */
    },
    {
-      MESA_FORMAT_Z24_UNORM_X8_UINT,          /* Name */
-      "MESA_FORMAT_Z24_UNORM_X8_UINT",        /* StrName */
+      MESA_FORMAT_Z24_UNORM_S8_UINT,          /* Name */
+      "MESA_FORMAT_Z24_UNORM_S8_UINT",        /* StrName */
       GL_DEPTH_STENCIL,            /* BaseFormat */
       GL_UNSIGNED_NORMALIZED,      /* DataType */
       0, 0, 0, 0,                  /* Red/Green/Blue/AlphaBits */
@@ -457,8 +457,8 @@ static struct gl_format_info format_info[MESA_FORMAT_COUNT] =
       1, 1, 2                      /* BlockWidth/Height,Bytes */
    },
    {
-      MESA_FORMAT_Z24_UNORM_S8_UINT,          /* Name */
-      "MESA_FORMAT_Z24_UNORM_S8_UINT",        /* StrName */
+      MESA_FORMAT_Z24_UNORM_X8_UINT,          /* Name */
+      "MESA_FORMAT_Z24_UNORM_X8_UINT",        /* StrName */
       GL_DEPTH_COMPONENT,          /* BaseFormat */
       GL_UNSIGNED_NORMALIZED,      /* DataType */
       0, 0, 0, 0,                  /* Red/Green/Blue/AlphaBits */
@@ -2472,7 +2472,7 @@ _mesa_format_to_type_and_comps(mesa_format format,
       *comps = 2;
       return;
 
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       *datatype = GL_UNSIGNED_INT_8_24_REV_MESA;
       *comps = 2;
       return;
@@ -2482,7 +2482,7 @@ _mesa_format_to_type_and_comps(mesa_format format,
       *comps = 1;
       return;
 
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       *datatype = GL_UNSIGNED_INT;
       *comps = 1;
       return;
@@ -3123,14 +3123,14 @@ _mesa_format_matches_format_and_type(mesa_format mesa_format,
       return format == GL_DEPTH_STENCIL && type == GL_UNSIGNED_INT_24_8 &&
          !swapBytes;
    case MESA_FORMAT_X8Z24_UNORM:
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       return GL_FALSE;
 
    case MESA_FORMAT_Z_UNORM16:
       return format == GL_DEPTH_COMPONENT && type == GL_UNSIGNED_SHORT &&
          !swapBytes;
 
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       return GL_FALSE;
 
    case MESA_FORMAT_Z_UNORM32:
diff --git a/src/mesa/main/formats.h b/src/mesa/main/formats.h
index 66c01c1..8c8e95f 100644
--- a/src/mesa/main/formats.h
+++ b/src/mesa/main/formats.h
@@ -389,13 +389,13 @@ typedef enum
    MESA_FORMAT_G16R16_UNORM,     /* GGGG GGGG GGGG GGGG RRRR RRRR RRRR RRRR */
    MESA_FORMAT_B10G10R10A2_UNORM,/* BBBB BBBB BBGG GGGG GGGG RRRR RRRR RRAA */
    MESA_FORMAT_S8_UINT_Z24_UNORM,/* SSSS SSSS ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ */
-   MESA_FORMAT_Z24_UNORM_X8_UINT,/* ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ xxxx xxxx */
+   MESA_FORMAT_Z24_UNORM_S8_UINT,/* ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ xxxx xxxx */
 
    /* Type A format(s) */
    MESA_FORMAT_Z_UNORM16,     /* ushort[i] = Z */
 
    /* Type P formats */
-   MESA_FORMAT_Z24_UNORM_S8_UINT,/* ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ SSSS SSSS */
+   MESA_FORMAT_Z24_UNORM_X8_UINT,/* ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ SSSS SSSS */
    MESA_FORMAT_X8Z24_UNORM,      /* xxxx xxxx ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ ZZZZ */
 
    /* Type A formats */
diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index e163468..522b346 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -595,7 +595,7 @@ fast_read_depth_stencil_pixels(struct gl_context *ctx,
       return GL_FALSE;
 
    if (rb->Format != MESA_FORMAT_S8_UINT_Z24_UNORM &&
-       rb->Format != MESA_FORMAT_Z24_UNORM_X8_UINT)
+       rb->Format != MESA_FORMAT_Z24_UNORM_S8_UINT)
       return GL_FALSE;
 
    ctx->Driver.MapRenderbuffer(ctx, rb, x, y, width, height, GL_MAP_READ_BIT,
diff --git a/src/mesa/main/texformat.c b/src/mesa/main/texformat.c
index bda2d8e..004e7eb 100644
--- a/src/mesa/main/texformat.c
+++ b/src/mesa/main/texformat.c
@@ -209,13 +209,13 @@ _mesa_choose_tex_format(struct gl_context *ctx, GLenum target,
    case GL_DEPTH_COMPONENT24:
    case GL_DEPTH_COMPONENT32:
       RETURN_IF_SUPPORTED(MESA_FORMAT_Z_UNORM32);
-      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_S8_UINT);
       RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_X8_UINT);
+      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_S8_UINT);
       break;
    case GL_DEPTH_COMPONENT16:
       RETURN_IF_SUPPORTED(MESA_FORMAT_Z_UNORM16);
-      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_S8_UINT);
       RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_X8_UINT);
+      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_S8_UINT);
       break;
 
    case GL_COMPRESSED_ALPHA_ARB:
@@ -426,7 +426,7 @@ _mesa_choose_tex_format(struct gl_context *ctx, GLenum target,
    case GL_DEPTH_STENCIL_EXT:
    case GL_DEPTH24_STENCIL8_EXT:
       RETURN_IF_SUPPORTED(MESA_FORMAT_S8_UINT_Z24_UNORM);
-      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_X8_UINT);
+      RETURN_IF_SUPPORTED(MESA_FORMAT_Z24_UNORM_S8_UINT);
       break;
 
    case GL_DEPTH_COMPONENT32F:
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 1e4308a..3e22a0b 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -1049,7 +1049,7 @@ _mesa_texstore_x8_z24(TEXSTORE_PARAMS)
    const GLuint depthScale = 0xffffff;
 
    (void) dims;
-   ASSERT(dstFormat == MESA_FORMAT_Z24_UNORM_S8_UINT);
+   ASSERT(dstFormat == MESA_FORMAT_Z24_UNORM_X8_UINT);
 
    {
       /* general path */
@@ -2558,7 +2558,7 @@ _mesa_texstore_s8_z24(TEXSTORE_PARAMS)
    GLuint *depth;
    GLubyte *stencil;
 
-   ASSERT(dstFormat == MESA_FORMAT_Z24_UNORM_X8_UINT);
+   ASSERT(dstFormat == MESA_FORMAT_Z24_UNORM_S8_UINT);
    ASSERT(srcFormat == GL_DEPTH_STENCIL_EXT ||
           srcFormat == GL_DEPTH_COMPONENT ||
           srcFormat == GL_STENCIL_INDEX);
@@ -3699,9 +3699,9 @@ _mesa_get_texstore_func(mesa_format format)
       table[MESA_FORMAT_G16R16_UNORM] = _mesa_texstore_unorm1616;
       table[MESA_FORMAT_B10G10R10A2_UNORM] = _mesa_texstore_argb2101010;
       table[MESA_FORMAT_S8_UINT_Z24_UNORM] = _mesa_texstore_z24_s8;
-      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = _mesa_texstore_s8_z24;
+      table[MESA_FORMAT_Z24_UNORM_S8_UINT] = _mesa_texstore_s8_z24;
       table[MESA_FORMAT_Z_UNORM16] = _mesa_texstore_z16;
-      table[MESA_FORMAT_Z24_UNORM_S8_UINT] = _mesa_texstore_x8_z24;
+      table[MESA_FORMAT_Z24_UNORM_X8_UINT] = _mesa_texstore_x8_z24;
       table[MESA_FORMAT_X8Z24_UNORM] = _mesa_texstore_z24_x8;
       table[MESA_FORMAT_Z_UNORM32] = _mesa_texstore_z32;
       table[MESA_FORMAT_S_UINT8] = _mesa_texstore_s8;
diff --git a/src/mesa/state_tracker/st_format.c b/src/mesa/state_tracker/st_format.c
index 90e9f2f..5f951eb 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -107,11 +107,11 @@ st_mesa_format_to_pipe_format(mesa_format mesaFormat)
       return PIPE_FORMAT_Z32_UNORM;
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       return PIPE_FORMAT_S8_UINT_Z24_UNORM;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       return PIPE_FORMAT_Z24_UNORM_S8_UINT;
    case MESA_FORMAT_X8Z24_UNORM:
       return PIPE_FORMAT_X8Z24_UNORM;
-   case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
       return PIPE_FORMAT_Z24X8_UNORM;
    case MESA_FORMAT_S_UINT8:
       return PIPE_FORMAT_S8_UINT;
@@ -465,9 +465,9 @@ st_pipe_format_to_mesa_format(enum pipe_format format)
    case PIPE_FORMAT_X8Z24_UNORM:
       return MESA_FORMAT_X8Z24_UNORM;
    case PIPE_FORMAT_Z24X8_UNORM:
-      return MESA_FORMAT_Z24_UNORM_S8_UINT;
-   case PIPE_FORMAT_Z24_UNORM_S8_UINT:
       return MESA_FORMAT_Z24_UNORM_X8_UINT;
+   case PIPE_FORMAT_Z24_UNORM_S8_UINT:
+      return MESA_FORMAT_Z24_UNORM_S8_UINT;
    case PIPE_FORMAT_Z32_FLOAT:
       return MESA_FORMAT_Z_FLOAT32;
    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
diff --git a/src/mesa/swrast/s_depth.c b/src/mesa/swrast/s_depth.c
index 93aaffc..8c225e1 100644
--- a/src/mesa/swrast/s_depth.c
+++ b/src/mesa/swrast/s_depth.c
@@ -552,8 +552,8 @@ _swrast_clear_depth_buffer(struct gl_context *ctx)
    height = ctx->DrawBuffer->_Ymax - ctx->DrawBuffer->_Ymin;
 
    mapMode = GL_MAP_WRITE_BIT;
-   if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
-       rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+   if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+       rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
        rb->Format == MESA_FORMAT_S8_UINT_Z24_UNORM ||
        rb->Format == MESA_FORMAT_X8Z24_UNORM) {
       mapMode |= GL_MAP_READ_BIT;
@@ -602,8 +602,8 @@ _swrast_clear_depth_buffer(struct gl_context *ctx)
          }
       }
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_Z24_UNORM_S8_UINT:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
    case MESA_FORMAT_X8Z24_UNORM:
       {
@@ -611,8 +611,8 @@ _swrast_clear_depth_buffer(struct gl_context *ctx)
          GLuint clearVal = 0;
          GLuint mask;
 
-         if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
-             rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT)
+         if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+             rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT)
             mask = 0xff000000;
          else
             mask = 0xff;
@@ -692,7 +692,7 @@ _swrast_clear_depth_stencil_buffer(struct gl_context *ctx)
    }
 
    switch (rb->Format) {
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
    case MESA_FORMAT_S8_UINT_Z24_UNORM:
       {
          GLfloat zClear = (GLfloat) ctx->Depth.Clear;
@@ -700,7 +700,7 @@ _swrast_clear_depth_stencil_buffer(struct gl_context *ctx)
 
          _mesa_pack_float_z_row(rb->Format, 1, &zClear, &clear);
 
-         if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) {
+         if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
             mask = ((~writeMask) & 0xff) << 24;
             clear |= (ctx->Stencil.Clear & writeMask & 0xff) << 24;
          }
diff --git a/src/mesa/swrast/s_drawpix.c b/src/mesa/swrast/s_drawpix.c
index ed4487f..f7926e4 100644
--- a/src/mesa/swrast/s_drawpix.c
+++ b/src/mesa/swrast/s_drawpix.c
@@ -500,7 +500,7 @@ draw_rgba_pixels( struct gl_context *ctx, GLint x, GLint y,
 
 
 /**
- * Draw depth+stencil values into a MESA_FORAMT_Z24_S8 or MESA_FORMAT_Z24_UNORM_X8_UINT
+ * Draw depth+stencil values into a MESA_FORAMT_Z24_S8 or MESA_FORMAT_Z24_UNORM_S8_UINT
  * renderbuffer.  No masking, zooming, scaling, etc.
  */
 static void
@@ -573,7 +573,7 @@ draw_depth_stencil_pixels(struct gl_context *ctx, GLint x, GLint y,
 
    if (depthRb == stencilRb &&
        (depthRb->Format == MESA_FORMAT_S8_UINT_Z24_UNORM ||
-        depthRb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) &&
+        depthRb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) &&
        type == GL_UNSIGNED_INT_24_8 &&
        !scaleOrBias &&
        !zoom &&
diff --git a/src/mesa/swrast/s_renderbuffer.c b/src/mesa/swrast/s_renderbuffer.c
index cf5e223..dfd3a60 100644
--- a/src/mesa/swrast/s_renderbuffer.c
+++ b/src/mesa/swrast/s_renderbuffer.c
@@ -102,7 +102,7 @@ soft_renderbuffer_storage(struct gl_context *ctx, struct gl_renderbuffer *rb,
       rb->Format = MESA_FORMAT_Z_UNORM16;
       break;
    case GL_DEPTH_COMPONENT24:
-      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
+      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       break;
    case GL_DEPTH_COMPONENT32:
       rb->Format = MESA_FORMAT_Z_UNORM32;
diff --git a/src/mesa/swrast/s_stencil.c b/src/mesa/swrast/s_stencil.c
index e7c35ff..eba9da8 100644
--- a/src/mesa/swrast/s_stencil.c
+++ b/src/mesa/swrast/s_stencil.c
@@ -614,7 +614,7 @@ _swrast_clear_stencil_buffer(struct gl_context *ctx)
          }
       }
       break;
-   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       {
          GLuint clear = (ctx->Stencil.Clear & writeMask & 0xff) << 24;
          GLuint mask = (((~writeMask) & 0xff) << 24) | 0xffffff;
diff --git a/src/mesa/swrast/s_texfetch.c b/src/mesa/swrast/s_texfetch.c
index 7a3e76f..b620748 100644
--- a/src/mesa/swrast/s_texfetch.c
+++ b/src/mesa/swrast/s_texfetch.c
@@ -383,7 +383,7 @@ texfetch_funcs[] =
       fetch_texel_3d_f_z24_s8
    },
    {
-      MESA_FORMAT_Z24_UNORM_X8_UINT,
+      MESA_FORMAT_Z24_UNORM_S8_UINT,
       fetch_texel_1d_f_s8_z24,
       fetch_texel_2d_f_s8_z24,
       fetch_texel_3d_f_s8_z24
@@ -395,7 +395,7 @@ texfetch_funcs[] =
       fetch_texel_3d_f_z16
    },
    {
-      MESA_FORMAT_Z24_UNORM_S8_UINT,
+      MESA_FORMAT_Z24_UNORM_X8_UINT,
       fetch_texel_1d_f_s8_z24,
       fetch_texel_2d_f_s8_z24,
       fetch_texel_3d_f_s8_z24
diff --git a/src/mesa/swrast/s_texfetch_tmp.h b/src/mesa/swrast/s_texfetch_tmp.h
index f304889..806f0fd 100644
--- a/src/mesa/swrast/s_texfetch_tmp.h
+++ b/src/mesa/swrast/s_texfetch_tmp.h
@@ -1556,8 +1556,8 @@ static void FETCH(f_s8_z24)( const struct swrast_texture_image *texImage,
    const GLuint *src = TEXEL_ADDR(GLuint, texImage, i, j, k, 1);
    const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
    texel[0] = (GLfloat) (((*src) & 0x00ffffff) * scale);
-   ASSERT(texImage->Base.TexFormat == MESA_FORMAT_Z24_UNORM_X8_UINT ||
-	  texImage->Base.TexFormat == MESA_FORMAT_Z24_UNORM_S8_UINT);
+   ASSERT(texImage->Base.TexFormat == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+	  texImage->Base.TexFormat == MESA_FORMAT_Z24_UNORM_X8_UINT);
    ASSERT(texel[0] >= 0.0F);
    ASSERT(texel[0] <= 1.0F);
 }




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