Mesa (master): i965: Bump generation check in code to disable HiZ at LODs > 0.
Kenneth Graunke
kwg at kemper.freedesktop.org
Wed Feb 19 09:43:13 UTC 2014
Module: Mesa
Branch: master
Commit: 577fdf1f4896041263b6de5980343c6721f6ec00
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=577fdf1f4896041263b6de5980343c6721f6ec00
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 6 07:32:49 2014 -0800
i965: Bump generation check in code to disable HiZ at LODs > 0.
Broadwell's "HiZ Resolve" operation still has the restriction that the
rectangle primitive must be 8x4 aligned. So I believe we still need
this.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2198b8e..8e0d2be 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1237,7 +1237,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw,
{
assert(mt->hiz_mt);
- if (brw->is_haswell) {
+ if (brw->gen >= 8 || brw->is_haswell) {
uint32_t width = minify(mt->physical_width0, level);
uint32_t height = minify(mt->physical_height0, level);
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