Mesa (master): i965: Disable MCS on Broadwell for now.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 80c4edfc27a4ee77d8fea4dd558a18f69df0579a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=80c4edfc27a4ee77d8fea4dd558a18f69df0579a

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Feb 10 12:02:14 2014 -0800

i965: Disable MCS on Broadwell for now.

v2: Add a perf_debug() message to remind us to come back to this.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 8e0d2be..ba59ecd 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -84,6 +84,14 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target)
    case GL_DEPTH_STENCIL:
       return INTEL_MSAA_LAYOUT_IMS;
    default:
+      /* Disable MCS on Broadwell for now.  We can enable it once things
+       * are working without it.
+       */
+      if (brw->gen >= 8) {
+         perf_debug("Missing CMS support on Broadwell.\n");
+         return INTEL_MSAA_LAYOUT_UMS;
+      }
+
       /* From the Ivy Bridge PRM, Vol4 Part1 p77 ("MCS Enable"):
        *
        *   This field must be set to 0 for all SINT MSRTs when all RT channels