Mesa (broadwell): 53 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Thu Feb 20 00:31:47 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e11aaec32827fcac7fa320b7fb65c285d01ee67d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 27 15:49:56 2014 -0800
i965/fs: Implement scratch read/write support for Broadwell.
To make sure that both the Gen4 and Gen7 style messages work, I
initially disabled the SHADER_OPCODE_GEN7_SCRATCH_READ optimization,
ran Piglit, re-enabled it, and ran Piglit again. Both worked fine.
Fixes 40 Piglit tests (most of the varying-packing category).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0f84714cb30e81979a4d86640f595ec8e144de9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 27 15:44:18 2014 -0800
i965: Add Gen8 assembly support for DP Scratch messages.
The new accessors will make it easy to do Gen7-style scratch messages.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a95723b65b0f54fd6f86c1c3ee673bb00e41af3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Feb 4 22:18:03 2014 -0800
i965: Store absolute thread count in max_wm_threads on Broadwell.
In the past, 3DSTATE_PS took an absolute number of threads. Conversely,
on Broadwell you always program 64, and it implicitly scales based on
the GT-level with no special programming. So, I stored 64 in
brw_device_info::max_wm_threads.
However, I didn't realize that we also use max_wm_threads to compute the
size of the scratch space buffer. In that case, we really need the
absolute number of threads.
This patch hardcodes 3DSTATE_PS to use the value it expects, and changes
max_wm_threads back to a (completely fake) absolute thread count (once
again copied from Haswell).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5901a32533c8a258d6b52fbce7c7a36a255f918
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 13:45:27 2014 -0800
i965/fs: Implement FS_OPCODE_[UN]PACK_HALF_2x16_SPLIT[_XY] opcodes.
I'd neglected to port these to Broadwell. Most of this code is copy
and pasted from Gen7, but instead of using F32TO16/F16TO32, we just
use MOV with HF register types.
Fixes fs-packHalf2x16 and fs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72049155f7c4358042da9e5d4d116b1426eff1c1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Jan 29 14:16:27 2014 -0800
i965: Drop bogus F32TO16/F16TO32 instructions on Broadwell - use MOV.
Broadwell removed the F32TO16 and F16TO32 instructions. However, it has
actual support for HF values, so they're actually just MOV.
Fixes vs-packHalf2x16 and vs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=26855b98699decea7732e670c0bdd1b4ae5c188a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:56:38 2014 -0800
stash - vp fixes?
doesn't seem to actually fix anything.
oh, this might only be relevant when I turn on the viewport extents test
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=caaebe40aa69e7be57ff576f14451d20835ed567
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 30 15:30:19 2014 -0800
i965: Use MOV, not OR for setting URB write channel enables on Gen8+.
On Broadwell, g0.5 contains the "Scratch Space Pointer"; using OR
puts some bits of that into "ignored" sections of our message header.
While this doesn't hurt, it's also not terribly /useful/. Using MOV
is sufficient to set the only interesting bits in this part of the
message header.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=464e6156e175a7da102171cd6e4e4ce7ccdd466f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Jan 28 22:02:56 2014 -0800
Also emit VF_INSTANCING in the no-elements case.
I can't imagine why this would matter since there's no actual data being
pulled, but...for safety?
Not observed to help anything
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d306380086cc6f5445d575c9e3a40c8eadd8ae88
Author: Eric Anholt <eric at anholt.net>
Date: Thu Feb 13 09:30:41 2014 -0800
i965: Drop the blitter-based glBlitFramebuffer() path.
Now that meta can do single-copy blits even from renderbuffers and depth,
we don't need this any more.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cd03f3350f4ac9c518b6fb37e05885f24221ddf
Author: Eric Anholt <eric at anholt.net>
Date: Thu Feb 13 09:31:38 2014 -0800
i965: Drop blorp for glBlitFramebuffer() except for the stencil case.
I still need to do stencil for meta's blit path.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7ff0fdd4f17e7aafa457cf579ee9bb80cd4ac4f
Author: Eric Anholt <eric at anholt.net>
Date: Mon Feb 10 23:44:54 2014 -0800
meta: Add support for integer blits.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eb5133e265fbeec34a42abe029f848717dcbea6
Author: Eric Anholt <eric at anholt.net>
Date: Mon Feb 10 15:24:07 2014 -0800
meta: Add support for doing MSAA to MSAA blits.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bcad861402b37307c4aebc61ef214ba5776016c
Author: Eric Anholt <eric at anholt.net>
Date: Mon Feb 10 16:23:50 2014 -0800
meta: Save and restore a bunch of MSAA state.
We're disabling GL_MULTISAMPLE, so we didn't need to worry about a lot of
that state. But to do MSAA to MSAA blits, we need to start handling more
state.
v2: Fix pasteo caught by Kenneth.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=388734fb130aeced31dbcdfc31090dd035ec6aa5
Author: Eric Anholt <eric at anholt.net>
Date: Mon Feb 10 11:20:11 2014 -0800
meta: Try to do blending of sRGB values in linear colorspace.
Blending of values would occur when doing GL_LINEAR filtering with
scaling, and in an upcoming commit when doing MSAA resolves.
!UPSTREAM: [citation needed]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61b0bde39ce07bb0fb4ee353e2869da36e5f7604
Author: Eric Anholt <eric at anholt.net>
Date: Fri Feb 7 14:00:31 2014 -0800
meta: Add support for doing multisample resolves.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9aa285a549b932e1cc959eda11ae01162e55e7ca
Author: Eric Anholt <eric at anholt.net>
Date: Tue Feb 18 15:14:30 2014 -0800
i965: Fix miptree matching for multisampled, non-interleaved miptrees.
We haven't been executing this code before the meta-blit case, because
we've been flagging the miptree as validated at texstorage time, and never
having to revalidate.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f46746e8181d26dc32a06fd1222c1a5fffa2f72d
Author: Eric Anholt <eric at anholt.net>
Date: Wed Feb 5 10:54:51 2014 -0800
fix stretch blit
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2362d5e359ba2a567842fd4d1a27546dac7be13f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 26 00:20:21 2014 -0800
i965: Implement a CS stall workaround on Broadwell.
According to the latest documentation, any PIPE_CONTROL with the
"Command Streamer Stall" bit set must also have another bit set,
with five different options:
- Render Target Cache Flush
- Depth Cache Flush
- Stall at Pixel Scoreboard
- Post-Sync Operation
- Depth Stall
I chose "Stall at Pixel Scoreboard" since we've used it effectively
in the past, but the choice is fairly arbitrary.
Implementing this in the PIPE_CONTROL emit helpers ensures that the
workaround will always take effect when it ought to.
Apparently, this workaround may be necessary on older hardware as well;
for now I've only added it to Broadwell as it's absolutely necessary
there. Subsequent patches could add it to older platforms, provided
someone tests it there.
v2: Only flag "Stall at Pixel Scoreboard" when none of the other bits
are set (suggested by Ian Romanick).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=858a20edd85be00f96eae794210dfede3e6a4873
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 30 22:07:20 2013 -0800
i965: Enable Broadwell support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57405605a8c320f9d6ea389afd43ce6f013330a5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 11:42:47 2014 -0800
i965: Actually claim to support MSAA on Broadwell.
We need to advertise 8x, 4x, and 2x multisamples. Previously, we only
claimed to support 0/1 samples.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4af8c95783acb632befa40c5bfc7fc58b62873d0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 16:48:14 2014 -0800
i965: Update physical width/height munging for 2x IMS MSAA.
I can't find any documentation to explain what ought to be done here, so
I simply guessed based on the pattern I observed in the 4x/8x cases.
It appears to work, but it could be totally wrong.
I was able to find the Sandybridge PRM quote from the comments in the
latest documentation: Shared Functions > 3D Sampler > Multisampled
Surface Behavior. However, it only mentions 4x MSAA - not even 8x.
After a substantial amount more digging, I was able to find a second
page (incorrectly tagged) which confirmed the formulas in our code for
8x MSAA. However, that page didn't mention 2x MSAA at all.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=51145a24f7938a4d5575d8d9aa4f8afa369d836b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 19:37:08 2014 -0800
i965: Enable smooth points when multisampling without point sprites.
According to the "Point Multisample Rasterization" of the OpenGL
specification (3.0 or later), smooth points are supposed to be enabled
implicitly when multisampling, regardless of the GL_POINT_SMOOTH flag.
However, if GL_POINT_SPRITE is enabled, you get square points no matter
what. Core contexts always enable point sprites, so this effectively
makes smooth points go away, even in the case of multisampling.
Fixes Piglit's EXT_framebuffer_multisample/point-smooth tests.
(Yes, that's right folks, we actually have Piglit tests for this.)
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3d70580b52c37036e162a976efd9e038615e6d7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 18:17:10 2014 -0800
i965: Thwack multisample enable bit in 3DSTATE_RASTER.
The meaning and effects of this bit are surprisingly complicated.
See Rasterization > Windower > Multisampling > Multisample ModesState.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c5873c9b9cfe1e7e689b2ef92a205aeee03763b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 17:40:24 2014 -0800
i965: Only use the SIMD16 program for per-sample shading on Broadwell.
This restriction carries forward from earlier platforms. The code is
ported straight from gen7_wm_state.c.
v2: Actually do it right.
v3: Add missing _NEW_MULTISAMPLE bit (caught by Eric).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61d7ea4b16b1d5effd273027c21cf64841b67b78
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 17:31:00 2014 -0800
i965: Set "Position XY Offset Select" bits in 3DSTATE_PS on Broadwell.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=01c42b2be64ec83c28230c1f8e1cbb2c5f5bd690
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 20 23:06:30 2014 -0800
i965: Add missing sample shading bits to Gen8's 3DSTATE_PS_EXTRA.
v2: Also set the "oMask Present to Render Target" bit, which is required
for shaders that write oMask. Otherwise the hardware won't expect
the extra data.
v3: Add missing _NEW_MULTISAMPLE (caught by Eric).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77c37ed74b8b9bd8407e68961d1b324bf13f7881
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 15:46:56 2014 -0800
i965/fs: Implement FS_OPCODE_SET_OMASK on Broadwell.
I made a few changes which I think simplify the code a bit compared to
the Gen7 implementation, but which are largely pointless.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5476da79f87fed9173471d3ccd047b5ddeabecea
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 15:09:22 2014 -0800
i965/fs: Implement FS_OPCODE_SET_SAMPLE_ID on Broadwell.
Largely cut and paste from Gen7; it works the same way.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80c4edfc27a4ee77d8fea4dd558a18f69df0579a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 12:02:14 2014 -0800
i965: Disable MCS on Broadwell for now.
v2: Add a perf_debug() message to remind us to come back to this.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4eba0d124d798f20da3721224a79701da84efa66
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 11:18:41 2014 -0800
i965: Use gen7_surface_msaa_bits in Broadwell SURFACE_STATE code.
We already set the number of samples, but were missing the MSAA layout
mode. Reusing gen7_surface_msaa_bits makes it easy to set both.
This also lets us drop the Gen8 surface_num_multisamples function.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6eeae17c02267c57ba3f9f2ace6252fb50dbc9ec
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Feb 10 11:06:03 2014 -0800
i965: Use ffs() for sample counting in gen7_surface_msaa_bits().
The enumerations are just log2(num_samples) shifted by 3, which we can
easily compute via ffs().
This also makes it reusable for Broadwell, which has 2x MSAA.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ed5824a5d5400d1534139d2bda9858b95b67234
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Feb 9 16:14:27 2014 -0800
i965: Simplify Broadwell's 3DSTATE_MULTISAMPLE sample count handling.
These enumerations are simply log2 of the number of multisamples shifted
by a bit, so we can calculate them using ffs() in a lot less code.
Suggested by Eric Anholt.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7700c73cf4ba780e41c351a86976aa01a995c3ce
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Feb 18 09:38:04 2014 -0800
glsl: Silence "type qualifiers ignored on function return type" warning
The const in
const unsigned foo(void);
is meaningless. Removing it silences this warning:
src/glsl/ast_to_hir.cpp:1802:56: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c85fd5a964a78c9f7a93994fb79f1723c6f45b5
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Feb 18 09:36:08 2014 -0800
glsl: Only warn for macro names containing __
From page 14 (page 20 of the PDF) of the GLSL 1.10 spec:
"In addition, all identifiers containing two consecutive underscores
(__) are reserved as possible future keywords."
The intention is that names containing __ are reserved for internal use
by the implementation, and names prefixed with GL_ are reserved for use
by Khronos. Names simply containing __ are dangerous to use, but should
be allowed.
Per the Khronos bug mentioned below, a future version of the GLSL
specification will clarify this.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: "9.2 10.0 10.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Tested-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Tested-by: Darius Spitznagel <d.spitznagel at goodbytez.de>
Cc: Tapani Pälli <lemody at gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71870
Bugzilla: Khronos #11702
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bd78926304e72ef3566e977d0cb5a959d86b809
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Feb 18 09:10:36 2014 -0800
glcpp: Only warn for macro names containing __
Section 3.3 (Preprocessor) of the GLSL 1.30 spec (and later) and the
GLSL ES spec (all versions) say:
"All macro names containing two consecutive underscores ( __ ) are
reserved for future use as predefined macro names. All macro names
prefixed with "GL_" ("GL" followed by a single underscore) are also
reserved."
The intention is that names containing __ are reserved for internal use
by the implementation, and names prefixed with GL_ are reserved for use
by Khronos. Since every extension adds a name prefixed with GL_ (i.e.,
the name of the extension), that should be an error. Names simply
containing __ are dangerous to use, but should be allowed. In similar
cases, the C++ preprocessor specification says, "no diagnostic is
required."
Per the Khronos bug mentioned below, a future version of the GLSL
specification will clarify this.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: "9.2 10.0 10.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Tested-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Tested-by: Darius Spitznagel <d.spitznagel at goodbytez.de>
Cc: Tapani Pälli <lemody at gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71870
Bugzilla: Khronos #11702
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4c734297f890eb7034793428ee20c28eaad5a69
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Tue Feb 4 11:54:38 2014 -0500
configure: Use LLVM shared libraries by default
Linking with LLVM static libraries is easily broken by changes to
the llvm-config program or when LLVM adds, removes, or changes library
components. Keeping up with these changes requires a lot of maintanence
effort to keep the build working on the master and stable branches.
Also, because of issues in the past LLVM static libraries, the release
manager is currently configuring with --with-llvm-shared-libs when
checking the build before release. Enabling shared libraries by
default would allow the release manager to run ./configure with
no arguments, and be reasonably confident that the build would succeed.
Acked-by: Emil Velikov <emil.l.velikov at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8928d7860a6b14ec57c3a600bc429e4563990ead
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:36:48 2014 +0100
i965/fs: Allocate the param_size array dynamically.
Useful because the total number of uniform components might exceed
MAX_UNIFORMS * 4 in some cases because of the image metadata we'll be
passing as push constants.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eef710fc53113a5b3d6bbf7d9a20f63d7add7911
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:27:01 2014 +0100
i965/fs: Use a separate variable to keep track of the last uniform index seen.
Like the VEC4 back-end does. It will make dynamic allocation of the
param_size array easier in a future commit.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9186cd39d42dff5a730134535c6ad647a51c44f8
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Feb 19 12:02:57 2014 -0500
freedreno: tweak ringbuffer sizes/count
Since we are now consuming two ringbuffers at a time, we probably want a
pool larger than 4.. but we don't need each individual ringbuffer to be
so large, so offset the pool size increase by reducing rb size.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5993723471a81003bd82d189836ccdd8d085a7b5
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Feb 19 11:55:25 2014 -0500
freedreno/a3xx/compiler: scheduling/legalize fixes
It seems the write-after-read hazard that applies to texture fetch
instructions, also applies to sfu instructions.
Also, cat5/cat6 instructions do not have a (ss) bit, so in these
cases we need to insert a dummy nop instruction with (ss) bit set.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbf8239f92ecd79431dfa41402e1c85318e7267f
Author: Francisco Jerez <currojerez at riseup.net>
Date: Fri Nov 22 15:59:56 2013 -0800
i965: Have brw_imm_vf4() take the vector components as integer values.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=51b00c5cb9383e59a04431356e3b3605801d13e3
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sat Nov 23 12:08:00 2013 -0800
i965: Add helper function to find out the signedness of a register type.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=560f10e573e74854c0313091a5d032700d58a2f1
Author: Francisco Jerez <currojerez at riseup.net>
Date: Thu Nov 28 18:13:18 2013 -0800
i965/vec4: Use swizzle() in the ARB_vertex_program code.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8797ccf3fa29eb16f20012b0f3e8ff3e647fbec4
Author: Francisco Jerez <currojerez at riseup.net>
Date: Thu Nov 28 18:04:10 2013 -0800
i965/fs: Use offset() in the ARB_fragment_program code.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f56d5dc6047d0f926706e28fe1d809622c5b7e3
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sun Dec 8 04:59:11 2013 +0100
i965/fs: Remove fs_reg::retype.
There doesn't seem to be any reason for it to be a method, and it's
surprising that the expression 'reg.retype(t)' doesn't retype its
object but rather it creates a temporary with the new type. Use
'retype(reg, t)' instead.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b032732753b18c84482e30dd3675403eec7919f
Author: Francisco Jerez <currojerez at riseup.net>
Date: Thu Nov 28 15:07:06 2013 -0800
i965/vec4: Trivial improvements to the with_writemask() function.
Add assertion that the register is not in the HW_REG or IMM file,
calculate the conjunction of the old and new mask instead of replacing
the old [consistent with the behavior of brw_writemask(), causes no
functional changes right now], make it static inline to let the
compiler do a slightly better job at optimizing things, and shorten
its name.
v2: Assert that the new writemask is not zero to avoid undefined
hardware behaviour.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42b226ef824ed61ccf51fa9a1198cba305ad5472
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:21:07 2014 +0100
i965: Make sure that backend_reg::type and brw_reg::type are consistent for fixed regs.
And define non-mutating helper functions to retype fixed and normal
regs with a common interface. At some point we may want to get rid of
::fixed_hw_reg completely and have fixed regs use the normal register
data members (e.g. backend_reg::reg to select a fixed GRF number,
src_reg::swizzle to store the swizzle, etc.), I have the feeling that
this is not the last headache we're going to get because of the
multiple ways to represent the same thing and the different register
interface depending on the file a register is stored in...
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=98306e727b8291507ff4fd5dd5c4806f3fed9202
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:20:27 2014 +0100
i965/vec4: Add non-mutating helper functions to modify src_reg::swizzle and ::negate.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2337820d49149126991d0814b225db7b57789016
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:19:10 2014 +0100
i965: Add non-mutating helper functions to modify the register offset.
Yes, we could avoid having four copies of essentially the same code by
using templates here.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=af25addcd0aaf373bd91c6a0b6c97d4c73092f91
Author: Francisco Jerez <currojerez at riseup.net>
Date: Fri Nov 22 19:21:13 2013 -0800
i965/vec4: Fix off-by-one register class overallocation.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a32817f3c248125fb537c3a915566445e5600d45
Author: Francisco Jerez <currojerez at riseup.net>
Date: Tue Nov 26 19:56:07 2013 -0800
i965: Unify fs_generator:: and vec4_generator::mark_surface_used as a free function.
This way it can be used anywhere. I need it from the visitor.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae8b066da5862b4cfc510b3a9a0e1273f9f6edd4
Author: Francisco Jerez <currojerez at riseup.net>
Date: Wed Feb 19 15:14:02 2014 +0100
i965: Move up duplicated fields from stage-specific prog_data to brw_stage_prog_data.
There doesn't seem to be any reason for nr_params, nr_pull_params,
param, and pull_param to be duplicated in the stage-specific
subclasses of brw_stage_prog_data. Moving their definition to the
common base class will allow some code sharing in a future commit, the
removal of brw_vec4_prog_data_compare and brw_*_prog_data_free, and
the simplification of the stage-specific brw_*_prog_data_compare.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f00c5f1a3e0db20a89cfedefd53cbe817fec9e3
Author: Francisco Jerez <currojerez at riseup.net>
Date: Fri Nov 22 20:22:03 2013 -0800
i965/vec4: Add constructor of src_reg from a fixed hardware reg.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
More information about the mesa-commit
mailing list