Mesa (master): nv50: enable txg where supported

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: d1b1329c3a69fa018cdd3fcb1fd751da58023633
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1b1329c3a69fa018cdd3fcb1fd751da58023633

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Wed Feb 19 21:29:40 2014 -0500

nv50: enable txg where supported

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp |    3 ++-
 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp |    4 ++++
 src/gallium/drivers/nouveau/nv50/nv50_screen.c            |    3 ++-
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
index bef103f..e2f93bb 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -1447,7 +1447,7 @@ CodeEmitterNV50::emitTEX(const TexInstruction *i)
       code[0] |= 0x01000000;
       break;
    case OP_TXG:
-      code[0] = 0x01000000;
+      code[0] |= 0x01000000;
       code[1] = 0x80000000;
       break;
    default:
@@ -1790,6 +1790,7 @@ CodeEmitterNV50::emitInstruction(Instruction *insn)
    case OP_TXB:
    case OP_TXL:
    case OP_TXF:
+   case OP_TXG:
       emitTEX(insn->asTex());
       break;
    case OP_TXQ:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index d226d0c..ccddb9a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -558,6 +558,7 @@ static nv50_ir::operation translateOpcode(uint opcode)
    NV50_IR_OPCODE_CASE(SAD, SAD);
    NV50_IR_OPCODE_CASE(TXF, TXF);
    NV50_IR_OPCODE_CASE(TXQ, TXQ);
+   NV50_IR_OPCODE_CASE(TG4, TXG);
 
    NV50_IR_OPCODE_CASE(EMIT, EMIT);
    NV50_IR_OPCODE_CASE(ENDPRIM, RESTART);
@@ -2434,6 +2435,9 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
    case TGSI_OPCODE_TXD:
       handleTEX(dst0, 3, 3, 0x03, 0x0f, 0x10, 0x20);
       break;
+   case TGSI_OPCODE_TG4:
+      handleTEX(dst0, 2, 2, 0x03, 0x0f, 0x00, 0x00);
+      break;
    case TGSI_OPCODE_TEX2:
       handleTEX(dst0, 2, 2, 0x03, 0x10, 0x00, 0x00);
       break;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 2099515..ab0d63e 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -193,12 +193,13 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_ENDIANNESS:
       return PIPE_ENDIAN_LITTLE;
    case PIPE_CAP_TGSI_VS_LAYER:
-   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
       return 0;
    case PIPE_CAP_MAX_VIEWPORTS:
       return NV50_MAX_VIEWPORTS;
+   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+      return (class_3d >= NVA3_3D_CLASS) ? 4 : 0;
    default:
       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
       return 0;