Mesa (master): ilo: allow ilo_view_surface to skip layer offsetting
Chia-I Wu
olv at kemper.freedesktop.org
Wed Jan 8 10:13:10 UTC 2014
Module: Mesa
Branch: master
Commit: 8d9f5d57e25af3de0e35e5c7f3c0bff03b080ba7
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d9f5d57e25af3de0e35e5c7f3c0bff03b080ba7
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Fri Dec 20 23:59:34 2013 +0800
ilo: allow ilo_view_surface to skip layer offsetting
Make offset to layer optional in ilo_gpe_init_view_surface_for_texture.
render_cache_rw is always the same as is_rt and is replaced.
---
src/gallium/drivers/ilo/ilo_gpe.h | 10 ++---
src/gallium/drivers/ilo/ilo_gpe_gen6.c | 74 ++++++++++++++------------------
src/gallium/drivers/ilo/ilo_gpe_gen7.c | 74 ++++++++++++++------------------
src/gallium/drivers/ilo/ilo_state.c | 2 +-
4 files changed, 72 insertions(+), 88 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_gpe.h b/src/gallium/drivers/ilo/ilo_gpe.h
index f0768b9..318650d 100644
--- a/src/gallium/drivers/ilo/ilo_gpe.h
+++ b/src/gallium/drivers/ilo/ilo_gpe.h
@@ -380,7 +380,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool render_cache_rw,
+ bool is_rt, bool offset_to_layer,
struct ilo_view_surface *surf);
void
@@ -406,7 +406,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool render_cache_rw,
+ bool is_rt, bool offset_to_layer,
struct ilo_view_surface *surf);
static inline void
@@ -452,18 +452,18 @@ ilo_gpe_init_view_surface_for_texture(const struct ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool render_cache_rw,
+ bool is_rt, bool offset_to_layer,
struct ilo_view_surface *surf)
{
if (dev->gen >= ILO_GEN(7)) {
ilo_gpe_init_view_surface_for_texture_gen7(dev, tex, format,
first_level, num_levels, first_layer, num_layers,
- is_rt, render_cache_rw, surf);
+ is_rt, offset_to_layer, surf);
}
else {
ilo_gpe_init_view_surface_for_texture_gen6(dev, tex, format,
first_level, num_levels, first_layer, num_layers,
- is_rt, render_cache_rw, surf);
+ is_rt, offset_to_layer, surf);
}
}
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen6.c b/src/gallium/drivers/ilo/ilo_gpe_gen6.c
index e3cbd42..5babbce 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen6.c
@@ -1902,7 +1902,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool render_cache_rw,
+ bool is_rt, bool offset_to_layer,
struct ilo_view_surface *surf)
{
int surface_type, surface_format;
@@ -1988,52 +1988,44 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
assert(tex->interleaved);
if (is_rt) {
- /*
- * Compute the offset to the layer manually.
- *
- * For rendering, the hardware requires LOD to be the same for all
- * render targets and the depth buffer. We need to compute the offset
- * to the layer manually and always set LOD to 0.
- */
- if (true) {
- /* we lose the capability for layered rendering */
- assert(num_layers == 1);
-
- layer_offset = ilo_texture_get_slice_offset(tex,
- first_level, first_layer, &x_offset, &y_offset);
-
- assert(x_offset % 4 == 0);
- assert(y_offset % 2 == 0);
- x_offset /= 4;
- y_offset /= 2;
-
- /* derive the size for the LOD */
- width = u_minify(width, first_level);
- height = u_minify(height, first_level);
- if (surface_type == BRW_SURFACE_3D)
- depth = u_minify(depth, first_level);
- else
- depth = 1;
-
- first_level = 0;
- first_layer = 0;
- lod = 0;
- }
- else {
- layer_offset = 0;
- x_offset = 0;
- y_offset = 0;
- }
-
assert(num_levels == 1);
lod = first_level;
}
else {
+ lod = num_levels - 1;
+ }
+
+ /*
+ * Offset to the layer. When rendering, the hardware requires LOD and
+ * Depth to be the same for all render targets and the depth buffer. We
+ * need to offset to the layer manually and always set LOD and Depth to 0.
+ */
+ if (offset_to_layer) {
+ /* we lose the capability for layered rendering */
+ assert(is_rt && num_layers == 1);
+
+ layer_offset = ilo_texture_get_slice_offset(tex,
+ first_level, first_layer, &x_offset, &y_offset);
+
+ assert(x_offset % 4 == 0);
+ assert(y_offset % 2 == 0);
+ x_offset /= 4;
+ y_offset /= 2;
+
+ /* derive the size for the LOD */
+ width = u_minify(width, first_level);
+ height = u_minify(height, first_level);
+
+ first_level = 0;
+ first_layer = 0;
+
+ lod = 0;
+ depth = 1;
+ }
+ else {
layer_offset = 0;
x_offset = 0;
y_offset = 0;
-
- lod = num_levels - 1;
}
/*
@@ -2076,7 +2068,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
BRW_SURFACE_CUBEFACE_ENABLES;
}
- if (render_cache_rw)
+ if (is_rt)
dw[0] |= BRW_SURFACE_RC_READ_WRITE;
dw[1] = layer_offset;
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen7.c b/src/gallium/drivers/ilo/ilo_gpe_gen7.c
index 545b367..d421c16 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen7.c
@@ -429,7 +429,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool render_cache_rw,
+ bool is_rt, bool offset_to_layer,
struct ilo_view_surface *surf)
{
int surface_type, surface_format;
@@ -505,52 +505,44 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
}
if (is_rt) {
- /*
- * Compute the offset to the layer manually.
- *
- * For rendering, the hardware requires LOD to be the same for all
- * render targets and the depth buffer. We need to compute the offset
- * to the layer manually and always set LOD to 0.
- */
- if (true) {
- /* we lose the capability for layered rendering */
- assert(num_layers == 1);
-
- layer_offset = ilo_texture_get_slice_offset(tex,
- first_level, first_layer, &x_offset, &y_offset);
-
- assert(x_offset % 4 == 0);
- assert(y_offset % 2 == 0);
- x_offset /= 4;
- y_offset /= 2;
-
- /* derive the size for the LOD */
- width = u_minify(width, first_level);
- height = u_minify(height, first_level);
- if (surface_type == BRW_SURFACE_3D)
- depth = u_minify(depth, first_level);
- else
- depth = 1;
-
- first_level = 0;
- first_layer = 0;
- lod = 0;
- }
- else {
- layer_offset = 0;
- x_offset = 0;
- y_offset = 0;
- }
-
assert(num_levels == 1);
lod = first_level;
}
else {
+ lod = num_levels - 1;
+ }
+
+ /*
+ * Offset to the layer. When rendering, the hardware requires LOD and
+ * Depth to be the same for all render targets and the depth buffer. We
+ * need to offset to the layer manually and always set LOD and Depth to 0.
+ */
+ if (offset_to_layer) {
+ /* we lose the capability for layered rendering */
+ assert(is_rt && num_layers == 1);
+
+ layer_offset = ilo_texture_get_slice_offset(tex,
+ first_level, first_layer, &x_offset, &y_offset);
+
+ assert(x_offset % 4 == 0);
+ assert(y_offset % 2 == 0);
+ x_offset /= 4;
+ y_offset /= 2;
+
+ /* derive the size for the LOD */
+ width = u_minify(width, first_level);
+ height = u_minify(height, first_level);
+
+ first_level = 0;
+ first_layer = 0;
+
+ lod = 0;
+ depth = 1;
+ }
+ else {
layer_offset = 0;
x_offset = 0;
y_offset = 0;
-
- lod = num_levels - 1;
}
/*
@@ -622,7 +614,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
else
dw[0] |= GEN7_SURFACE_ARYSPC_LOD0;
- if (render_cache_rw)
+ if (is_rt)
dw[0] |= BRW_SURFACE_RC_READ_WRITE;
if (surface_type == BRW_SURFACE_CUBE && !is_rt)
diff --git a/src/gallium/drivers/ilo/ilo_state.c b/src/gallium/drivers/ilo/ilo_state.c
index fc120f8..8437ab1 100644
--- a/src/gallium/drivers/ilo/ilo_state.c
+++ b/src/gallium/drivers/ilo/ilo_state.c
@@ -943,7 +943,7 @@ ilo_create_sampler_view(struct pipe_context *pipe,
templ->u.tex.last_level - templ->u.tex.first_level + 1,
templ->u.tex.first_layer,
templ->u.tex.last_layer - templ->u.tex.first_layer + 1,
- false, false, &view->surface);
+ false, true, &view->surface);
}
return &view->base;
More information about the mesa-commit
mailing list