Mesa (broadwell): 91 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Wed Jan 8 23:26:58 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9badfaa32012e7ac45fed3b90f1dc9ccb3faf174
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 30 22:07:20 2013 -0800
i965: Enable Broadwell support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f48e297943f1d435aa76f82b58f319005497eac
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 19 15:15:01 2013 -0800
i965: Enable native ETC texture support on Broadwell.
Broadwell, like Baytrail, has native ETC texture support.
XXX: Piglit failures.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=74ac9c973bedb9b70cf7791412872bad676d76a8
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 11:41:34 2013 -0700
i965: Add (disabled) Broadwell PCI IDs.
This puts the PCI IDs in place so it's easy to enable support. However,
it doesn't actually enable support since it's very preliminary still,
and a few crucial pieces (such as BLORP) are still missing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c964cbe3a3d3cb086b542c6f76144191fafdc08b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 6 03:07:54 2013 -0800
i965: Disable 3DSTATE_WM_HZ_OP fields.
We'll need to do better than this when we implement multisampling, HiZ,
or fast clears...but for now, this will do.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0abad3ee31b2b9a6700429ba3a427fd344745a07
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 18 10:10:07 2013 -0800
i965: Fix MI_STORE_REGISTER_MEM for Broadwell.
It now takes a 48-bit address.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7847e9f61c0bd909ecd4c7f288227db67f00e5fc
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 8 22:21:29 2013 -0800
i965: Disable workaround flush for push constants on Broadwell.
If it wasn't necessary for Haswell, it's likely not to be necessary for
Broadwell either.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe1db34e14d919667a86f89b39f83c04f4d1a59f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 11 18:30:32 2013 -0800
i965: Emit 3DSTATE_VF on Broadwell too.
It's not just for Haswell.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b773df2d2cec88833d127a9e58cc786d56f4925
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 4 23:19:55 2013 -0800
i965: Update GS state for Broadwell.
This is quite similar to the Gen7 code. The main changes:
- 48-bit relocations
- Thread count is specified as U/2-1 instead of U-1.
- An extra DWord (DW9) with clip planes, URB entry output length/offsets
- We need to program the "Expected Vertex Count" (VerticesIn)
v2: Set the number of binding table entries so they can be prefetched
(requested by Eric Anholt).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df434ccef9d0f30901fccf95dd683c3de6e0f2a6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 15:20:37 2012 -0800
i965: Update multisampling state for Broadwell.
On previous platforms, 3DSTATE_MULTISAMPLE contained the number of
samples, pixel location, and the positions of each sample within a pixel
for each multisampling mode (4x and 8x). It was also a non-pipelined
command, presumably since changing the sample positions is fairly
drastic.
Broadwell improves upon this by splitting the sample positions out into
a separate non-pipelined state packet, 3DSTATE_SAMPLE_PATTERN. With
that removed, 3DSTATE_MULTISAMPLE becomes a pipelined state packet.
Broadwell also supports 2x and 16x multisampling, in addition to the 4x
and 8x supported by Gen7. This patch, however, does not implement 2x
and 16x.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d379723449fd0eccc9f1f74289607352c7bcc718
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jan 12 16:12:38 2013 -0800
i965: Update blitter code for 48-bit addresses.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=268ad17f4d44f1765d9eda068d2695e5ea8aef33
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 14 03:58:30 2012 -0800
i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.
XXX: Can probably just merge this in with the Gen7 code...
not really many changes. OUT_RELOC64 and a few extra DWords (Qpitch)
XXX: lots of these parameters are garbage...
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2ba9d362d4ac49ca4751ae244d44c3007baaeaf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 19:30:26 2012 -0800
i965: Update BLEND_STATE for Broadwell.
v2: Allow logic ops on all surface types. The UNORM restriction was
lifted with Haswell and I simply hadn't noticed. Also, add missing
BRW_NEW_STATE_BASE_ADDRESS dirty bit. Both caught by Eric Anholt.
v3: Fix swapped per-RT DWord pairs. Eliminates bizarre hacks.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=787cdc9f9adf692a5e73c0f7c41dbc8565b8be11
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 15:34:34 2012 -0800
i965: Update SF_CLIP_VIEWPORT for Broadwell.
It has more fields now. Not sure if this is correct for render_to_fbo.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c65ce684c13a661eb62e8a6d92cd39ccb5df44d9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 16:39:03 2012 -0800
i965: Rework SURFACE_STATE entries for Broadwell.
v2: Add missing SCS setting in gen8_emit_buffer_surface_state (caught by
Eric Anholt).
v3: Use stored QPitch rather than recomputing it.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c50f6e0ad4d60c8692fd7e3eb72e1a2e7f90eec4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 14:45:19 2012 -0800
i965: Update SOL state for Broadwell.
Unlike on Gen7, we can directly set the offset via the state packet.
We also -have- to: the kernel SOL reset code won't work anymore.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6078ce16d2612596ce9cb6736857f3ada790e1ad
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:39:19 2012 -0800
i965: Update the code that disables unused shader stages for Broadwell.
v2: Also disable 3DSTATE_WM_CHROMAKEY for safety.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v1]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9f33a9a610eb87b635d72960ac5da211af33ac4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 11:39:14 2012 -0800
i965: Double the push constant space multipliers on Broadwell too.
Broadwell has 2Kb push constant size increments like Haswell GT3.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15e8f5b8a5324f23283d6b6446b752c126b104bb
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 16:29:33 2013 -0700
i965: Update 3DSTATE_CLIP for Broadwell.
Broadwell doesn't have GEN6_CLIP_Z_TEST, and doesn't make you specify
the polygon winding information (it pulls that information from other
packets).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97f1dc5a32290d2fd69b100a6b50bb1d655df706
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 18:28:29 2012 -0800
i965: Rework vertex uploads for Broadwell.
v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56fa5beb7d31db73f93cf8e0093ba4e0dc94ffda
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 15:28:39 2012 -0800
i965: Update invariant state for Broadwell.
The only difference is that STATE_SIP takes a 48-bit address, so we need
to output two zeroes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a63db39667ba8669f5d8e7eefc4ef3a472d3b20b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 13:53:40 2012 -0800
i965: Update STATE_BASE_ADDRESS for Broadwell.
v2: Fix missing "change" bit on instruction state base address
(caught by Haihao Xiang).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7f87c6a265440749c248ec07c3796d9de2fd77e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 21:00:27 2012 -0800
i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.
v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e94b91055a32084ae8b03bbe56c031660898815
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:10:19 2012 -0800
i965: Rework 3DSTATE_VS for Broadwell.
v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to
urb_entry_output_offset to closer match the documentation.
v3: Only emit a non-zero constant buffer read length when active.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=14649136c61acc5023cea80fee81775090efc8cc
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 18:43:59 2012 -0800
i965: Add the new 3DSTATE_PS_BLEND state packet.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f506de0263df7de49960f64246af96ec1a74a1d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 17:52:31 2012 -0800
i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec1bb4b83cd2d0803d2cb3d0c11815176b3ba219
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 14:37:33 2013 -0700
i965: Update SF, SBE, and RASTER state for Broadwell.
The attribute override portion of 3DSTATE_SBE was split out into
3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into
3DSTATE_RASTER.
v2: Set Force URB Read Offset bit. Eventually the URB read offset
should be set in 3DSTATE_VS, but that will require some refactoring.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=af72ae2257e21d21c053b35c39227dd4f9a126ed
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:50:22 2012 -0800
i965: Bump generation assertions on workaround flushes.
These workaround flushes may not be necessary on Gen8. Investigation is
needed. Tentatively, let's do them out of caution.
v2: [chadv]
- Comment that flush may not be needed.
- Make assertion conditions symmetrical.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eb7199b29810f32599eb25258cf5f74a884d7bf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:30:01 2012 -0800
i965: Use the Sandybridge VUE format on Broadwell as well.
It hasn't changed.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=08cab6e7b6a2760c0dc2b6bcd60b629ba97e856d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:16:18 2012 -0800
i965: Duplicate gen7_atoms to gen8_atoms.
It's going to diverge significantly. Starting out with a copy allows
future patches to change atoms one by one.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1345203adffebf6e30470cd11a18930747ee56a9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Nov 5 16:55:06 2013 -0800
i965: Reserve space for "Vertex Count" in GS outputs.
v2: Also increment ir->offset in the GS visitor, rather than at the
final assembly generation stage (requested by Paul).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=056e768be361d6a0969d8d0e94044cd2cc5e5e73
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:38:26 2012 -0800
i965: Create a new fragment shader backend for Broadwell.
This replaces the old fs_generator backend.
v2: Port to the C-based representation of assembly instructions.
Fix texturing after the texture-grf merge.
v3: Add high quality derivative support. Fix SET_SIMD4X2_OFFSET.
v4: Pass brw_context to gen8_instruction functions as required.
v5: Fixes for MRT, as well as zero render targets (alpha test only).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=86869bbb79f6baf1133b7591b3dfacb552545726
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:37:34 2012 -0800
i965: Create a new vec4 backend for Broadwell.
This replaces the old vec4_generator backend.
v2: Port to use the C-based instruction representation. Also, remove
Geometry Shader offset hacks - the visitor will handle those instead
of this code.
v3: Texturing fixes (including adding textureGather support).
v4: Pass brw_context to gen8_instruction functions as required.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ad3f28123a74832c11b3da2ec43551253c61a3b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:36:50 2012 -0800
i965: Add a new infrastructure for generating Broadwell shader assembly.
This replaces the brw_eu_emit.c layer for Broadwell. It will be
used by both the vector and scalar shader backends.
v2: Port to use the C-based instruction representation.
v3: Fix destination register type for CMP.
v4: Pass brw to gen8_instruction functions (required by rebase).
v5: Remove bogus assertion on math instructions (caught by Piglit).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=490f3560928b2e066df4e0baf751fe872aa139dc
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 11 00:26:11 2012 -0800
i965: Implement a disassembler for Broadwell's new instruction encoding
Heavily based on Keith Packard's existing brw_disasm.c code. I've tried
to go through most of the pieces (like SFIDs) and update the lists to
include features added in recent generations.
v2: Port to use the C-based instruction emitters. This allows us to use
C99 array initializers, which tidies up some of the code.
v3: Improve decoding of render target write messages.
v4: Update for BRW_REGISTER_TYPE becoming an abstraction.
v5: Rebase on Chris Forbes' SFID message defines.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05019cab98c5ce1968cf73a19c07be703e88f80a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:36:26 2012 -0800
i965: Add a new representation for Broadwell shader instructions.
Broadwell significantly changes the EU instruction encoding. Many of
the fields got moved to different bit positions; some even got split
in two.
With so many changes, it was infeasible to continue using struct
brw_instruction. We needed a new representation.
This new approach is a bit different: rather than a struct, I created a
class that has four DWords, and helper functions that read/write various
bits. This has several advantages:
1. We can create several different names for the same bits. For
example, conditional modifiers, SFID for SEND instructions, and the
MATH instruction's function opcode are all stored in bits 27:24.
In each situation, we can use the appropriate setter function:
set_sfid(), set_math_function(), or set_cond_modifier(). This
is much easier to follow.
2. Since the fields are expressed using the original 128-bit numbers,
the code to create the getter/setter functions follows the table in
the documentation very closely.
To aid in debugging, I've enabled -fkeep-inline-functions when building
gen8_instruction.c. Otherwise, these functions cannot be called by
gdb, making it insanely difficult to print out anything.
Kenneth Graunke wrote most of this code. Damien Lespiau ported it to
C99. Xiang Haihao added media fields. Zhao Yakui added indirect
addressing support. Eric Anholt added an assertion to make sure that
values fit in the alloted number of bits.
v2: Update for brw_reg_type_to_hw_type(), which necessitates passing
brw_context pointers around everywhere.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3b8e0766a929727914de8bafee323690cdb8fa1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Dec 8 16:35:36 2013 -0800
i965: Add SFID #defines for media stuff.
While we probably won't ever use these, having them makes it easy to
share disassembler code between intel-gpu-tools and Mesa.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d28a0cd785141c7e1fb97cbcd6fc8cf0c303e003
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Dec 8 16:33:19 2013 -0800
i965: Add #defines for new Broadwell math functions.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=267d77341e16d18edbf9c2a183d0259711a21521
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Nov 17 19:32:49 2013 +1300
i965: add struct and SFID for pixel interpolator messages
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=94c0536f1d96a4a0dff3d226b6a5fdb9c51ff978
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 12 00:44:11 2013 -0800
i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions.
Now that we have a helper function that handles the PIPE_CONTROL
variations between the various platforms, these are basically the same.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d02ed71b95ffad7aa9bcfad42577af46c6304010
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:54:07 2013 -0800
i965: Update PIPE_CONTROL packet lengths for Broadwell.
On Broadwell, PIPE_CONTROL needs an extra DWord to accomodate the
48-bit addressing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b2bd95aceb3e24190acc52961f5068ce28a0bb6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 4 16:55:26 2013 -0800
i965: Introduce an OUT_RELOC64 macro.
Broadwell uses 48-bit addresses. The first DWord is the low 32 bits,
and the second DWord is the high 16 bits.
Since individual buffers shouldn't be larger than 4GB in size, any
offsets into those buffers (buffer->offset + delta) should fit in the
low 32 bits. So I believe we can simply emit 0 for the high 16-bits,
and drm_intel_bo_emit_reloc() should patch it up.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e22a0758dea76268bda7369445a522fb9501cda0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:21:47 2013 -0800
i965: Create a helper function for emitting PIPE_CONTROL writes.
There are a lot of places that use PIPE_CONTROL to write a value to a
buffer (either an immediate write, TIMESTAMP, or PS_DEPTH_COUNT).
Creating a single function to do this seems convenient.
As part of this refactor, we now set the PPGTT/GTT selection bit
correctly on Gen7+. Previously, we set bit 2 of DW2 on all platforms.
This is correct for Sandybridge, but actually part of the address on
Ivybridge and later!
Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to adjust that in substantially fewer
places, giving us confidence that we've hit them all.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e636978e10a72b21e5e23db82a0ae72c86fca078
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:25:58 2013 -0800
i965: Use full-length PIPE_CONTROL packets for workaround writes.
I believe that PIPE_CONTROL uses the length field to decide whether to
do 32-bit or 64-bit writes. A length of 4 would do a 32-bit write,
while a length of 5 would do a 64-bit write. (I haven't verified this,
though.)
For workaround writes, we don't care what value gets written, or how
much data. We're only writing something because hardware bugs mandate
that do so. So using a 64-bit write should be fine.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b6264d151526a1f85ac2ab11dd8a37db195caf1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 21:58:06 2013 -0800
i965: Use Global GTT for Sandybridge post-sync non-zero workaround.
The kernel doesn't even set up the aliasing PPGTT on Sandybridge, so any
writes marked as PPGTT will likely just get dropped on the floor.
This begs the question: is the simple act of /requesting/ a write good
enough for the workaround, or does it need to actually work? Past
experience suggests the workaround was effective even with PPGTT
selected. But perhaps we'll get lucky and this will help even more...
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a584a1a347d77ad5219edda7a3575563c2bb4ea9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:22:26 2013 -0800
i965: Emit full-length PIPE_CONTROLs for (non-write) flushes.
The PIPE_CONTROL packet actually has 5 DWords on Gen6+:
1. Header
2. Flags
3. Address
4. Immediate Data: Lower DWord
5. Immediate Data: Upper DWord
We just never emitted the last one. While it appears to work, it's
probably safer to emit the entire thing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fab295602dcdd62f221638538f145a7c7d714d7c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 14:44:45 2013 -0800
i965: Create a helper function for emitting PIPE_CONTROL flushes.
These days, we need to emit PIPE_CONTROL flushes all over the place.
Being able to do that via a single function call seems convenient.
Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to do this in substantially fewer places.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bbb4fe57cc73728190c8b4246705fb1e108bd4f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 14:55:45 2013 -0800
i965: Delete duplicate write_timestamp function.
brw_queryobj.c needs a version of write_timestamp that works on all
generations for the QueryCounter() driver hook. So there's no point in
duplicating it in gen6_queryobj.c.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=847bc36a38d42967ad6bf0492fe90a4892d9d799
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 5 22:57:01 2014 -0800
glsl: Optimize pow(2, x) --> exp2(x).
On Haswell, POW takes 24 cycles, while EXP2 only takes 14. Plus, using
POW requires putting 2.0 in a register, while EXP2 doesn't.
I believe that EXP2 will be faster than POW on basically all GPUs, so
it makes sense to optimize it.
Looking at the savage2 subset of shader-db:
total instructions in shared programs: 113225 -> 113179 (-0.04%)
instructions in affected programs: 2139 -> 2093 (-2.15%)
instances of 'math pow': 795 -> 749 (-6.14%)
instances of 'math exp': 389 -> 435 (11.8%)
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e3fd6a9dbd62ca5cd9965282fac01a34d23733e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 5 22:42:31 2014 -0800
glsl: Refactor is_zero/one/negative_one into an is_value() method.
This patch creates a new generic is_value() method, which checks if an
ir_constant has a particular value. (For vectors, it must have the
single value repeated across all components.)
It then rewrites the is_zero/is_one/is_negative_one methods to use this
generic helper. All three were basically identical except for the value
they checked for. The other difference is that is_negative_one rejects
boolean types. The new is_value function maintains this behavior, only
allowing boolean types when checking for 0 or 1.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6c1d66d3a74e25435b5ebcde208e8049b669120
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 5 22:19:42 2014 -0800
glsl: Optimize pow(1.0, X) --> 1.0.
Surprisingly, this helps one vertex shader in 3DMMES.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05fbb021a6329add4b37c876c0621c1dcc3d4ef9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Jan 5 20:03:00 2014 -0800
mesa: Use get_local_param_pointer in glProgramLocalParameters4fvEXT().
Using the get_local_param_pointer helper ensures that the LocalParams
arrays have actually been allocated before attempting to use them.
glProgramLocalParameters4fvEXT needs to do a bit of extra checking,
but it can be simplified since the helper has already validated the
target.
Fixes crashes in programs that use Cg (for example, Awesomenauts,
Rocketbirds: Hardboiled Chicken, and Tiny and Big: Grandpa's Leftovers)
since commit e5885c119de1e508099cc1111e1c9f8ff00fab88
(mesa: Dynamically allocate the storage for program local parameters.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73136
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
Tested-by: Laurent Carlier <lordheavym at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d368b982af5e6566c7da7fd2bc8b190af28188b
Author: José Fonseca <jfonseca at vmware.com>
Date: Mon Jan 6 18:45:49 2014 +0000
llvmpipe: Basic implementation of pipe_context::set_sample_mask.
We don't support MSAA (ie, number of samples is always one) therefore
sample_mask boils down to a synonym of the rasterizer_discard flag.
Also, this change makes setup actually use the value received in
lp_setup_set_rasterizer_discard instead of reaching out to llvmpipe
upper layers to re-fetch it.
Based on Si Chen's draft.
With this patch `wgf11multisample Coverage passes 100%` on the UMD
D3D10 state tracker.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Si Chen <sichen at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=95bf222603bbbb643a6119e370c6a616ccc5ceaf
Author: José Fonseca <jfonseca at vmware.com>
Date: Tue Jan 7 13:42:23 2014 +0000
cso_context: Fix cso_context::sample_mask initial value.
The initial value of cso_context::sample_mask_saved is irrelevant as it
will be overwritten with cso_context::sample_mask in
cso_save_sample_mask. Therefore it is cso_context::sample_mask that
needs to be properly initialized.
This fixes regressions in blits and mipmap generation after adding
support for sample_mask to llvmpipe.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72c6d0e506ad0e8262dddbc7a7cf2d6813761753
Author: Si Chen <sichen at vmware.com>
Date: Wed Dec 18 02:17:55 2013 -0800
llvmpipe: Implement alpha_to_coverage for non-MSAA framebuffers.
Implement Alpha to Coverage by discarding a fragment alpha component is
less than 0.5. This is a joint work of Jose and Si.
Reviewed-by: José Fonseca <jfonseca at vmware.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a0fb946e147f5482c93702fbf46ffdf5208f57c
Author: Andreas Fänger <a.faenger at e-sign.com>
Date: Tue Jan 7 03:10:00 2014 -0700
swrast: fix delayed texel buffer allocation regression for OpenMP
Commit 9119269ca14ed42b51c7d8e2e662500311b29fa3 moved the texel
buffer allocation to _swrast_texture_span(), however, when compiled
with OpenMP support this code already runs multi-threaded so a
critical section is required to prevent multiple allocations and
rendering errors.
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa4e2243a253d981e5f04426d509cd8257d140c4
Author: Dave Airlie <airlied at gmail.com>
Date: Tue Jan 7 08:51:10 2014 +1000
gallium/draw: remove double semicolon
code cleanup.
Signed-off-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d1400fe123dc229e87a3a6316b0697f864695a3
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 6 16:11:21 2014 -0700
glsl: rename min(), max() functions to fix MSVC build
Evidently, there's some other definition of "min" and "max" that
causes MSVC to choke on these function names. Renaming to min2()
and max2() fixes things.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6b10544cda34ec2e7f43de217e28ab2bdc2f63d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 21:53:27 2013 -0800
i965: Remove unused PIPE_CONTROL defines.
Both brw_defines.h and intel_reg.h defined PIPE_CONTROL fields, which
had similar names, but couldn't be used in the same way. (One had
built-in shifts, and the other didn't...)
Delete the unused set to preserve sanity.
(Eric wrote an almost identical patch back in August, so I believe he
approves.)
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8432832a7f3d3cc01f8bab8358069029d575ef0
Author: Vinson Lee <vlee at freedesktop.org>
Date: Mon Jan 6 12:09:29 2014 -0800
mesa: Remove GLXContextID typedef from glxext.h.
This patch fixes this build error with gcc <= 4.5 and clang <= 3.1.
CC clientattrib.lo
In file included from ../../include/GL/glx.h:333:0,
from glxclient.h:45,
from clientattrib.c:32:
../../include/GL/glxext.h:275:13: error: redefinition of typedef 'GLXContextID'
../../include/GL/glx.h:171:13: note: previous declaration of 'GLXContextID' was here
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70591
Signed-off-by: Vinson Lee <vlee at freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a44ca3595e71757c17093bd105fb1d4108d36340
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:55 2014 +0100
docs/relnotes/10.1.html: report AMD_shader_trinary_minmax support
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a9e8c23eb936bb165879ca52348ecb06a8b4701
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:54 2014 +0100
mesa: enable AMD_shader_trinary_minmax
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb5dc75601708d2d9bdf822960ae5b9151c105a1
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:53 2014 +0100
glsl: implement mid3 built-in function
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=73c74515879335625909d70e229e80caaac86aa3
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:52 2014 +0100
glsl: implement max3 built-in function
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce46e147295e841a7483d6dec2f943724ab964c3
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:51 2014 +0100
glsl: Implement min3 built-in function
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61c450fc81900131621e57fdd78a40e82239daf3
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:50 2014 +0100
glsl: add min() and max() functions to builder.cpp
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf70d2a7c0b8752001b7ed3a533aedb8c45759be
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:49 2014 +0100
glsl: add a shader_trinary_minmax predicate
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff50493bb34858811bc5e5f7b3b2428e9cd3fd25
Author: Maxence Le Doré <maxence.ledore at gmail.com>
Date: Fri Jan 3 00:09:48 2014 +0100
glsl: Add extension tracking for AMD_shader_trinary_minmax
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61ef697afc0ad509dcabdecfc424f27b5966969c
Author: Alexander von Gluck IV <kallisti5 at unixzen.com>
Date: Tue Dec 31 15:39:49 2013 -0600
haiku libGL: Move from gallium target to src/hgl
* The Haiku renderers need to link to libGL to function properly
in all usage contexts. As mesa drivers build before gallium
targets, we couldn't properly link the mesa swrast driver to
the gallium libGL target for Haiku.
* This is likely better as it mimics how glx is laid out ensuring
the Haiku libGL is better understood.
* All renderers properly link in libGL now.
Acked-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b236314a1107214210c429295fac8a5bdf457772
Author: Alexander von Gluck IV <kallisti5 at unixzen.com>
Date: Mon Dec 30 23:49:06 2013 -0600
haiku: Fix missing HaikuGL header paths
Acked-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3486f6f31b8cdb01e480cfbd8814c1e4222d26b0
Author: Brian Paul <brianp at vmware.com>
Date: Mon Jan 6 12:50:43 2014 -0700
mesa: implement missing glGet(GL_RGBA_SIGNED_COMPONENTS_EXT) query
This is part of the GL_EXT_packed_float extension.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=73096
Cc: 10.0 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7db56ddee07fb365832881e05205d98f281cea80
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 16:08:53 2013 -0800
i965: Warning fix
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=242ca9acb4b52e331dbbadc2d1e014e69c0539ad
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 6 10:51:20 2014 -0800
i965: Delete unused INTEL_WRITE_{PART,FULL} and INTEL_READ #defines.
These are just software flag values (not hardware specific values), and
aren't used anywhere. Delete them to avoid confusion.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=346b6abab9d0ec2d3aec6efe5a4bb03803666c2f
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sun Jan 5 12:48:30 2014 +0100
radeonsi: calculate NUM_BANKS for DB correctly on CIK
NUM_BANKS is not constant on CIK.
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf3c3611130112062470299c154df2610633683a
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Dec 27 19:17:47 2013 +0100
radeonsi: set correct pipe config for Hawaii in DB
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2748b7da7e2a65bc46d12187b27585902a88f0aa
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Dec 27 19:14:55 2013 +0100
radeonsi: disable HTILE for 1D-tiled depth-stencil buffers
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d41f5396f3cb619729021390c273f838d92f11fb
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Jan 3 05:57:00 2014 -0700
glx: check memory allocations in __glXInitVertexArrayState()
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c04cca0e1f10b0f0511f1dc0257c4b5138475e1
Author: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Date: Fri Jan 3 05:57:00 2014 -0700
glx: Add missing null check in __glXNewIndirectAPI()
Add extra null check in auto generated indirect_init.c via
src/mapi/glapi/gen/glX_proto_send.py
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0691b37732e3b032fbd354537b20090a3ee8e122
Author: Nathan Kidd <nkidd at opentext.com>
Date: Fri Jan 3 16:44:00 2014 -0700
docs: fix misspellings
Fixed what I noticed; no warranty for exhaustiveness.
Signed-off-by: Nathan Kidd <nkidd at opentext.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a61ae2aa01c9b1976ba4107c1564e0c3f94aea4d
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sat Jan 4 15:27:54 2014 +1300
i965: set size of txf_mcs payload vgrf properly
Previously we left the size of this vgrf as 1, which caused register
allocation to be subtly broken. If we were lucky we would explode in
the post-alloc instruction scheduler; if we were unlucky we'd just stomp
on someone else and get broken rendering.
Fixes crash when running `tesseract` with the following settings:
msaa 4
glineardepth 0
Also fixes the piglit test:
arb_sample_shading-builtin-gl-sample-id
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: Anuj Phogat <anuj.phogat at gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72859
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb212c5a302f0122a13b36dfdf07e91f951ae2e7
Author: Erik Faye-Lund <kusmabite at gmail.com>
Date: Tue Dec 17 16:37:33 2013 +0100
glcpp: error on multiple #else/#elif directives
The preprocessor currently accepts multiple else/elif-groups
per if-section. The GLSL-preprocessor is defined by the C++
specification, which defines the following parse-rule:
if-section:
if-group elif-groups(opt) else-group(opt) endif-line
This clearly only allows a single else-group, that has to come
after any elif-groups.
So let's modify the code to follow the specification. Add test
to prevent regressions.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Carl Worth <cworth at cworth.org>
Cc: 10.0 <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6005e9cb283214cd57038c7c5e7758ba72ec6ac2
Author: Carl Worth <cworth at cworth.org>
Date: Thu Dec 19 16:06:31 2013 -0800
glcpp: Replace multi-line comment with a space (even as part of macro definition)
The preprocessor has always replaced multi-line comments with a single space
character, (as required by the specification), but as of commit
bd55ba568b301d0f764cd1ca015e84e1ae932c8b the lexer also emitted a NEWLINE
token for each newline within the comment, (in order to preserve line
numbers).
The emitting of NEWLINE tokens within the comment broke the rule of "replace a
multi-line comment with a single space" as could be exposed by code like the
following:
#define FOO a/*
*/b
FOO
Prior to commit bd55ba568b301d0f764cd1ca015e84e1ae932c8b, this code defined
the macro FOO as "a b" as desired. Since that commit, this code instead
defines FOO as "a" and leaves a stray "b" in the output.
In this commit, we fix this by not emitting the NEWLINE tokens while lexing
the comment, but instead merely counting them in the commented_newlines
variable. Then, when the lexer next encounters a non-commented newline it
switches to a NEWLINE_CATCHUP state to emit as many NEWLINE tokens as
necessary (so that subsequent parsing stages still generate correct line
numbers).
Of course, it would have been more clear if we could have written a loop to
emit all the newlines, but flex conventions prevent that, (we must use
"return" for each token we emit).
It similarly would have been clear to have a new rule restricted to the
<NEWLINE_CATCHUP> state with an action much like the body of this if
condition. The problem with that is that this rule must not consume any
characters. It might be possible to write a rule that matches a single
lookahead of any character, but then we would also need an additional rule to
ensure for the <EOF> case where there are no additional characters available
for the lookahead to match.
Given those considerations, and given that the SKIP-state manipulation already
involves a code block at the top of the lexer function, before any rules, it
seems best to me to go with the implementation here which adds a similar
pre-rule code block for the NEWLINE_CATCHUP.
Finally, this commit also changes the expected output of a few, existing glcpp
tests. The change here is that the space character resulting from the
multi-line comment is now emitted before the newlines corresponding to that
comment. (Previously, the newlines were emitted first, and the space character
afterward.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72686
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61cea49014df6dcf3aa41ad18b2e998e6921320f
Author: Carl Worth <cworth at cworth.org>
Date: Thu Dec 19 15:14:19 2013 -0800
glcpp: Add a more descriptive comment for the SKIP state manipulation
Two things make this code confusing:
1. The uncharacteristic manipulation of lexer start state outside of
flex rules.
2. The confusing semantics of the skip_stack (including the
"lexing_if" override and the SKIP_NO_SKIP state).
This new comment is intended to bring a bit more clarity for any readers.
There is no intended beahvioral change to the code here. The actual code
changes include better indentation to avoid an excessively-long line, and
using the more descriptive INITIAL rather than 0.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a51c1b01a16d3256f9769a76d8293fea5853b1f
Author: Courtney Goeltzenleuchter <courtney at lunarg.com>
Date: Fri Dec 13 12:12:53 2013 -0700
i965: Enhance intel_texsubimage_tiled_memcpy() to support all levels
Support all levels of a supported texture format.
Using 1024x1024, RGBA 8888 source, mipmap
internal-format Before (MB/sec) mipmap (MB/sec)
GL_RGBA 627.15 615.90
GL_RGB 456.35 611.53
512x512
GL_RGBA 597.00 619.95
GL_RGB 440.62 611.28
256x256
GL_RGBA 487.80 587.42
GL_RGB 376.63 585.00
Benchmark has been sent to mesa-dev list: teximage_enh
Signed-off-by: Courtney Goeltzenleuchter <courtney at LunarG.com>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=85784fd832f34c9a8ab48a162dc82eb50f9c6d12
Author: Courtney Goeltzenleuchter <courtney at lunarg.com>
Date: Fri Dec 13 12:12:52 2013 -0700
i965: Add XRGB to intel_texsubimage_tiled_memcpy()
MESA_FORMAT_XRGB8888 is equivalent to MESA_FORMAT_ARGB8888 in terms
of storage on the device, so okay to use this optimized copy routine.
This series builds on work from Frank Henigman to optimize the
process of uploading a texture to the GPU. This series adds support for
MESA_XRGB_8888 and full miptrees where were found to be common activities
in the Smokin' Guns game. The issue was found while profiling the app
but that part is not benchmarked. Smokin-Guns uses mipmap textures with
an internal format of GL_RGB (MESA_XRGB_8888 in the driver).
These changes need a performance tool to run against to show how they
improve execution performance for specific texture formats. Using this
benchmark I've measured the following improvement on my Ivybridge
Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
1024x1024 texture size
internal-format Before (MB/sec) XRGB (MB/sec)
GL_RGBA 628.15 627.15
GL_RGB 265.95 456.35
512x512 texture size
internal-format Before (MB/sec) XRGB (MB/sec)
GL_RGBA 600.23 597.00
GL_RGB 255.50 440.62
256x256 texture size
internal-format Before (MB/sec) XRGB (MB/sec)
GL_RGBA 489.08 487.80
GL_RGB 229.03 376.63
Benchmark has been sent to mesa-dev list: teximage
Signed-off-by: Courtney Goeltzenleuchter <courtney at LunarG.com>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77c74c647be7d387d1f94e4a64ce44646a5b7ccd
Author: Paul Berry <stereotype441 at gmail.com>
Date: Mon Dec 16 15:10:42 2013 -0800
glsl: Fix gl_type of usamplerCube built-in type.
I'm not aware of any piglit tests that this fixes, but the old code
was obviously wrong.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e0b4b5e9b719de9f01e808fc18138b67be4178a
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 10:11:27 2013 -0800
mesa: Add an assertion to _mesa_program_index_to_target().
Only a Mesa bug could cause this function to be called with an
out-of-range index, so raise an assertion if that ever happens.
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=99e822fa18a322f7bf0d32ce99eab534d5614469
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 09:54:38 2013 -0800
mesa: Improve static error checking of arrays sized by MESA_SHADER_TYPES.
This patch replaces the following pattern:
foo bar[MESA_SHADER_TYPES] = {
...
};
With:
foo bar[] = {
...
};
STATIC_ASSERT(Elements(bar) == MESA_SHADER_TYPES);
This way, when a new shader type is added in a future version of Mesa,
we will get a compile error to remind us that the array needs to be
updated.
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b30e25f29752fe3782d9ad43cb2cee46885c487d
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 09:49:43 2013 -0800
glsl: Remove extraneous shader_type argument from analyze_clip_usage().
This argument was carrying the name of the shader target (as a
string). We can get this just as easily by calling
_mesa_shader_enum_to_string().
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d343e3d98c9ef639663efc371b1729dcc7788777
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 09:46:08 2013 -0800
glsl: Get rid of hardcoded arrays of shader target names.
We already have a function for converting a shader type index to a
string: _mesa_shader_type_to_string().
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=89c35c59a4421db863ba70b28a546b294f7b1ba9
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 10:07:24 2013 -0800
main: Remove unused function _mesa_shader_index_to_type().
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=26707abe5635e99814603a0f4895865e977cf267
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Dec 17 12:13:11 2013 -0800
Rename overloads of _mesa_glsl_shader_target_name().
Previously, _mesa_glsl_shader_target_name() had an overload for GLenum
and an overload for the gl_shader_type enum, each of which behaved
differently. However, since GLenum is a synonym for unsigned int, and
unsigned ints are often used in place of gl_shader_type (e.g. in loop
indices), there was a big risk of calling the wrong overload by
mistake. This patch gives the two overloads different names so that
it's always clear which one we mean to call.
Reviewed-by: Brian Paul <brianp at vmware.com>
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