Mesa (broadwell): 161 new commits
Kenneth Graunke
kwg at kemper.freedesktop.org
Tue Jan 14 09:02:20 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5441fe34f67d0402c1daa412570750032ae4676
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Jan 14 00:21:08 2014 -0800
mesa: Add a _mesa_log2 function for computing floor(log2(n)).
Finding the base 2 logarithm of an integer is really useful, and
unfortunately math.h doesn't define a function to find that.
The usual way to implement this is "31 - __builtin_clz(n)". We can
instead reuse _mesa_fls, which does "32 - __builtin_clz(n)" and subtract
one. This makes it work even on non-GCC.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f054c3b2e7208815cd44ff067f20691c66e077e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 30 22:07:20 2013 -0800
i965: Enable Broadwell support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a0ab9754d4195f622b9b720c63a64d07770d3f6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 11:41:34 2013 -0700
i965: Add (disabled) Broadwell PCI IDs.
This puts the PCI IDs in place so it's easy to enable support. However,
it doesn't actually enable support since it's very preliminary still,
and a few crucial pieces (such as BLORP) are still missing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c527373b6a4ff16a6a764ce05f8e3946a18e1816
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 6 03:07:54 2013 -0800
i965: Disable 3DSTATE_WM_HZ_OP fields.
We'll need to do better than this when we implement multisampling, HiZ,
or fast clears...but for now, this will do.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=535b5430bec4f39c3d1eb17c149d431f96ad48e5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 4 23:19:55 2013 -0800
i965: Update GS state for Broadwell.
This is quite similar to the Gen7 code. The main changes:
- 48-bit relocations
- Thread count is specified as U/2-1 instead of U-1.
- An extra DWord (DW9) with clip planes, URB entry output length/offsets
- We need to program the "Expected Vertex Count" (VerticesIn)
v2: Set the number of binding table entries so they can be prefetched
(requested by Eric Anholt).
v3: Add a WARN_ONCE for a missing workaround.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5847b567cba5feb2123aa64d00f1181aaea0988
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 15:20:37 2012 -0800
i965: Update multisampling state for Broadwell.
On previous platforms, 3DSTATE_MULTISAMPLE contained the number of
samples, pixel location, and the positions of each sample within a pixel
for each multisampling mode (4x and 8x). It was also a non-pipelined
command, presumably since changing the sample positions is fairly
drastic.
Broadwell improves upon this by splitting the sample positions out into
a separate non-pipelined state packet, 3DSTATE_SAMPLE_PATTERN. With
that removed, 3DSTATE_MULTISAMPLE becomes a pipelined state packet.
Broadwell also supports 2x and 16x multisampling, in addition to the 4x
and 8x supported by Gen7. This patch, however, does not implement 2x
and 16x.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a41d8f9b83dfd3e12a75a3407df220f6bb93197a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Jan 12 16:12:38 2013 -0800
i965: Update blitter code for 48-bit addresses.
v2: Rebase on Eric's SET_FIELD changes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v1]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f75ab20c890978c74d45f007e43d2203f4d8b49
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Dec 14 03:58:30 2012 -0800
i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.
XXX: Can probably just merge this in with the Gen7 code...
not really many changes. OUT_RELOC64 and a few extra DWords (Qpitch)
XXX: lots of these parameters are garbage...
v2: Rebase on Paul's rename of NumLayers -> MaxNumLayers.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e298fa494a3fb289d9ae8c4f13e24f735bbc3dc
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 19:30:26 2012 -0800
i965: Update BLEND_STATE for Broadwell.
v2: Allow logic ops on all surface types. The UNORM restriction was
lifted with Haswell and I simply hadn't noticed. Also, add missing
BRW_NEW_STATE_BASE_ADDRESS dirty bit. Both caught by Eric Anholt.
v3: Fix swapped per-RT DWord pairs. Eliminates bizarre hacks.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9936a3e24fe716fb77305bd206495c8cf8248c7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 5 15:34:34 2012 -0800
i965: Update SF_CLIP_VIEWPORT for Broadwell.
It has additional fields to support clipping to the viewport even if
guardband clipping is enabled.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=137cc0f741d6fcc23d800ff3ecddb0915210423c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 16:39:03 2012 -0800
i965: Rework SURFACE_STATE entries for Broadwell.
v2: Add missing SCS setting in gen8_emit_buffer_surface_state (caught by
Eric Anholt).
v3: Use stored QPitch rather than recomputing it.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=064d60fd858d64fb51591e96f519a0bb32276071
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 14:45:19 2012 -0800
i965: Update SOL state for Broadwell.
Unlike on Gen7, we can directly set the offset via the state packet.
We also -have- to: the kernel SOL reset code won't work anymore.
v2: Fix copy and paste mistake in buffer stride setup; drop stale
comment (caught by Eric Anholt). Add a perf_debug for missing
MOCS setup.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4af1637dfa693b3726138f37d0e0420173e74dd6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:39:19 2012 -0800
i965: Update the code that disables unused shader stages for Broadwell.
v2: Also disable 3DSTATE_WM_CHROMAKEY for safety.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net> [v1]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8f186b23dca3119e2cfea876d8141b11d443808
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 4 11:39:14 2012 -0800
i965: Double the push constant space multipliers on Broadwell too.
Broadwell has 2Kb push constant size increments like Haswell GT3.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=74fbac7ba6663183a05d6db47e4e6ae65b610e25
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 16:29:33 2013 -0700
i965: Update 3DSTATE_CLIP for Broadwell.
Broadwell's winding order, polygon fill, and viewport Z test fields have
moved to DWord 1 of 3DSTATE_RASTER.
v2: Add a perf_debug for a future optimization and improve commit
message (both suggested by Eric Anholt).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=728aeabab45abac079ed366cfdacce587bf0bfb0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 18:28:29 2012 -0800
i965: Rework vertex uploads for Broadwell.
v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed.
v3: Add WARN_ONCE and perf_debugs requested by Eric Anholt.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d983abf32078603464229d4f32cd119df941501
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 15:28:39 2012 -0800
i965: Update invariant state for Broadwell.
The only difference is that STATE_SIP takes a 48-bit address, so we need
to output two zeroes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbb37004637764449c6667dfb891921a56d79543
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Dec 3 13:53:40 2012 -0800
i965: Update STATE_BASE_ADDRESS for Broadwell.
v2: Fix missing "change" bit on instruction state base address
(caught by Haihao Xiang).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b986d4deaa76d732b08d3ea27c9bd9a652975c02
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 21:00:27 2012 -0800
i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.
v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9db500c6f6c52fbe28c6b5e2bf55312cd1b9e759
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:10:19 2012 -0800
i965: Rework 3DSTATE_VS for Broadwell.
v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to
urb_entry_output_offset to closer match the documentation.
v3: Only emit a non-zero constant buffer read length when active.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de36f2623a018b6ce6d773f93c38d4828eaa29f0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 18:43:59 2012 -0800
i965: Add the new 3DSTATE_PS_BLEND state packet.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70c0899114dfaca07d87cccf4132ac4ef80e04f1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 17:52:31 2012 -0800
i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=124e5557ed61bb6dc5f355db1bbdf8beb132cb49
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 1 14:37:33 2013 -0700
i965: Update SF, SBE, and RASTER state for Broadwell.
The attribute override portion of 3DSTATE_SBE was split out into
3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into
3DSTATE_RASTER.
v2: Set Force URB Read Offset bit. Eventually the URB read offset
should be set in 3DSTATE_VS, but that will require some refactoring.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8a2af04a10ddd84d813b062e9d360eca5b0ba92
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:50:22 2012 -0800
i965: Bump generation assertions on workaround flushes.
These workaround flushes may not be necessary on Gen8. Investigation is
needed. Tentatively, let's do them out of caution.
v2: [chadv]
- Comment that flush may not be needed.
- Make assertion conditions symmetrical.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71d11c467796288039914eb44074a2491a4da5f0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Nov 29 01:30:01 2012 -0800
i965: Use the Sandybridge VUE format on Broadwell as well.
It hasn't changed.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3c326534e4fa966594883794b326a419068100a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Nov 28 21:16:18 2012 -0800
i965: Duplicate gen7_atoms to gen8_atoms.
It's going to diverge significantly. Starting out with a copy allows
future patches to change atoms one by one.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1b47815cb17cece01d7c8bd129c35ad2ccbb3f7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Nov 5 16:55:06 2013 -0800
i965: Reserve space for "Vertex Count" in GS outputs.
v2: Also increment ir->offset in the GS visitor, rather than at the
final assembly generation stage (requested by Paul).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=159d6404bea610aa5aa1a34f569e90bfb4982fa9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:38:26 2012 -0800
i965: Create a new fragment shader backend for Broadwell.
This replaces the old fs_generator backend.
v2: Port to the C-based representation of assembly instructions.
Fix texturing after the texture-grf merge.
v3: Add high quality derivative support. Fix SET_SIMD4X2_OFFSET.
v4: Pass brw_context to gen8_instruction functions as required.
v5: Fixes for MRT, as well as zero render targets (alpha test only).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3ba65d416dc09cd157d39a3a90bb6a75f68bfd2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:37:34 2012 -0800
i965: Create a new vec4 backend for Broadwell.
This replaces the old vec4_generator backend.
v2: Port to use the C-based instruction representation. Also, remove
Geometry Shader offset hacks - the visitor will handle those instead
of this code.
v3: Texturing fixes (including adding textureGather support).
v4: Pass brw_context to gen8_instruction functions as required.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ec7410cd8c1d1c015ec0887264361da2d2de478
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:36:50 2012 -0800
i965: Add a new infrastructure for generating Broadwell shader assembly.
This replaces the brw_eu_emit.c layer for Broadwell. It will be
used by both the vector and scalar shader backends.
v2: Port to use the C-based instruction representation.
v3: Fix destination register type for CMP.
v4: Pass brw to gen8_instruction functions (required by rebase).
v5: Remove bogus assertion on math instructions (caught by Piglit).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Matt Turner <mattst88 at gmail.com> [v5]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87cfba586b98894c8b693fd801fbf30371ceb599
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 11 00:26:11 2012 -0800
i965: Implement a disassembler for Broadwell's new instruction encoding
Heavily based on Keith Packard's existing brw_disasm.c code. I've tried
to go through most of the pieces (like SFIDs) and update the lists to
include features added in recent generations.
v2: Port to use the C-based instruction emitters. This allows us to use
C99 array initializers, which tidies up some of the code.
v3: Improve decoding of render target write messages.
v4: Update for BRW_REGISTER_TYPE becoming an abstraction.
v5: Rebase on Chris Forbes' SFID message defines.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Acked-by: Matt Turner <mattst88 at gmail.com> [v5]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a03dfd872d0320026f918524b67116dd5b7036f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 6 22:36:26 2012 -0800
i965: Add a new representation for Broadwell shader instructions.
Broadwell significantly changes the EU instruction encoding. Many of
the fields got moved to different bit positions; some even got split
in two.
With so many changes, it was infeasible to continue using struct
brw_instruction. We needed a new representation.
This new approach is a bit different: rather than a struct, I created a
class that has four DWords, and helper functions that read/write various
bits. This has several advantages:
1. We can create several different names for the same bits. For
example, conditional modifiers, SFID for SEND instructions, and the
MATH instruction's function opcode are all stored in bits 27:24.
In each situation, we can use the appropriate setter function:
set_sfid(), set_math_function(), or set_cond_modifier(). This
is much easier to follow.
2. Since the fields are expressed using the original 128-bit numbers,
the code to create the getter/setter functions follows the table in
the documentation very closely.
To aid in debugging, I've enabled -fkeep-inline-functions when building
gen8_instruction.c. Otherwise, these functions cannot be called by
gdb, making it insanely difficult to print out anything.
Kenneth Graunke wrote most of this code. Damien Lespiau ported it to
C99. Xiang Haihao added media fields. Zhao Yakui added indirect
addressing support. Eric Anholt added an assertion to make sure that
values fit in the alloted number of bits.
v2: Update for brw_reg_type_to_hw_type(), which necessitates passing
brw_context pointers around everywhere.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
Acked-by: Matt Turner <mattst88 at gmail.com> [v2]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3e5d2996352ea93d9240547141c80cf500af905
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Dec 8 16:35:36 2013 -0800
i965: Add SFID #defines for media stuff.
While we probably won't ever use these, having them makes it easy to
share disassembler code between intel-gpu-tools and Mesa.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bf9de06b36b43ba7da8d4c6bc9c9db2c2bbcaa5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Dec 8 16:33:19 2013 -0800
i965: Add #defines for new Broadwell math functions.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=856a7181c92c3f6c3cbaa8de8469279bfe5fa4d0
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sun Nov 17 19:32:49 2013 +1300
i965: add struct and SFID for pixel interpolator messages
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=136a9c93c821836643cf11f0a0808d258930fa0d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 18 10:10:07 2013 -0800
i965: Fix MI_STORE_REGISTER_MEM for Broadwell.
It now takes a 48-bit address.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c724fab2edc2d054cfa67ed2a0edd429c6f94f2e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:54:07 2013 -0800
i965: Update PIPE_CONTROL packet lengths for Broadwell.
On Broadwell, PIPE_CONTROL needs an extra DWord to accomodate the
48-bit addressing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=369730a991c00d17176329a356656e387aa10f7c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 4 16:55:26 2013 -0800
!UPSTREAM i965: Introduce an OUT_RELOC64 macro.
Broadwell uses 48-bit addresses. The first DWord is the low 32 bits,
and the second DWord is the high 16 bits.
This patch is broken and superceded by others on the mailing list
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d84317aa1da1e40df57b83c816364bf3a243096f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 12 00:44:11 2013 -0800
i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions.
Now that we have a helper function that handles the PIPE_CONTROL
variations between the various platforms, these are basically the same.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fe5cf339e7c22dc77bcca9188942acd9ef31a46
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jan 13 16:00:18 2014 -0800
i965: Create a helper function for emitting PIPE_CONTROL writes.
There are a lot of places that use PIPE_CONTROL to write a value to a
buffer (either an immediate write, TIMESTAMP, or PS_DEPTH_COUNT).
Creating a single function to do this seems convenient.
As part of this refactor, we now set the PPGTT/GTT selection bit
correctly on Gen7+. Previously, we set bit 2 of DW2 on all platforms.
This is correct for Sandybridge, but actually part of the address on
Ivybridge and later!
Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to adjust that in substantially fewer
places, giving us confidence that we've hit them all.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce64d217ec777b4fc69a76eb6011dca72aea5194
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:25:58 2013 -0800
i965: Use full-length PIPE_CONTROL packets for workaround writes.
I believe that PIPE_CONTROL uses the length field to decide whether to
do 32-bit or 64-bit writes. A length of 4 would do a 32-bit write,
while a length of 5 would do a 64-bit write. (I haven't verified this,
though.)
For workaround writes, we don't care what value gets written, or how
much data. We're only writing something because hardware bugs mandate
that do so. So using a 64-bit write should be fine.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b6f3934df9fcaf6e5a9649fca6517b90a7566de
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 15:22:26 2013 -0800
i965: Emit full-length PIPE_CONTROLs for (non-write) flushes.
The PIPE_CONTROL packet actually has 5 DWords on Gen6+:
1. Header
2. Flags
3. Address
4. Immediate Data: Lower DWord
5. Immediate Data: Upper DWord
We just never emitted the last one. While it appears to work, it's
probably safer to emit the entire thing.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cac159279b48747887e3d3ec6cdc1777eaa885d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 14:44:45 2013 -0800
i965: Create a helper function for emitting PIPE_CONTROL flushes.
These days, we need to emit PIPE_CONTROL flushes all over the place.
Being able to do that via a single function call seems convenient.
Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to do this in substantially fewer places.
v2: Add back forgotten intel_emit_post_sync_nonzero_flush (caught by
Eric Anholt). Drop unlikely() from BLT_RING check.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c4a9f631d7438aeaf56785401891d0773792123
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Nov 11 18:30:32 2013 -0800
i965: Emit 3DSTATE_VF on Broadwell too.
It's not just for Haswell.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eadabec4cd0649af2827cce2bd71aea0cb6e7d06
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 8 22:21:29 2013 -0800
i965: Disable workaround flush for push constants on Broadwell.
If it wasn't necessary for Haswell, it's likely not to be necessary for
Broadwell either.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8618407d15ead94358ccd691f598ca1c76c46385
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Dec 19 15:15:01 2013 -0800
i965: Enable native ETC texture support on Broadwell.
Broadwell, like Baytrail, has native ETC texture support.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa772aa92baf659855f69829fa3f0d0f4fcbc2a6
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 16:02:34 2014 +0800
ilo: handle NULL renderbuffers correctly
Renderbuffers may be NULL since 9baa45f78b8ca7d66280e36009b6a685055d7cd6.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fdab3b201bd2a011e8e0b0b15aca7b7fb5a7aa5
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 14:51:51 2014 +0800
ilo: disable HiZ for misaligned levels
We need to disable HiZ for non-8x4 aligned levels, except for level 0, layer
0. For the very first layer we can adjust Width and Height fields of
3DSTATE_DEPTH_BUFFER to make it aligned.
Specifically, add ILO_TEXTURE_HIZ and set the flag only for properly aligned
levels. ilo_texture_can_enable_hiz() is updated to check for the flag.
In tex_layout_validate(), align the depth bo to 8x4 so that we can adjust
Width/Height of 3DSTATE_DEPTH_BUFFER without introducing out-of-bound access.
Finally in rectlist blitter, add the ability to adjust 3DSTATE_DEPTH_BUFFER.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=18645d1533032e0ee64714731977e12ee16d959b
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 13:50:12 2014 +0800
ilo: use a helper to determine if HiZ is enabled
Add ilo_texture_can_enable_hiz and replace all checks for tex->hiz.bo by calls
to ilo_texture_can_enable_hiz().
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1427c3f79faf3d502e5cc7d467c73e095bcd66de
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Mon Jan 13 01:03:15 2014 +0800
ilo: decide on hiz first in texture allocation
Add tex_layout_init_hiz() before tex_layout_init_format() to decide whether
HiZ should be enabled.
On GEN6, because of layer offsetting, HiZ is enabled only when the texture is
non-mipmapped and non-array. PIPE_USAGE_STAGING is also taken as a hint to
disable HiZ.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=194a61cd39ce21ca8e6a57ca496bc094de629c47
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Fri Jan 10 13:46:08 2014 +0800
ilo: emit gen7_wa_pipe_control_wm_max_threads_stall on Haswell
Rename the workaround, as it is for 3DSTATE_PS instead of 3DSTATE_WM, and emit
it on Haswell too.
This does not fix any app, but an assertion failure.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6605c51de99955c5ade7e241c38886372c1c850
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 15:15:07 2014 +0800
ilo: use HALIGN_4 on GEN7 for depth buffers
The comment was no longer true since 6642381e7513926b847d6bc10bf590e1c0c54859.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e90e3e39c24e0120558b33006bc5e2b69f4638b0
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 13:34:29 2014 +0800
ilo: OOM for HiZ is fatal on GEN6
On GEN6, HiZ and Separate Stencil Buffer must be enabled at the same time.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b1c516080989c950796a1e9087a07284887602b
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 14 13:33:22 2014 +0800
ilo: fix a HiZ bo leakage
Dereference the HiZ bo when the texture is destroyed.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=af57378e599c00711bf1109fb84e6032668ecaa4
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Fri Jan 10 13:50:52 2014 +0800
ilo: simplify ilo_texture_set_slice_flags()
Call ilo_texture_get_slice() for the last slice so that we can get rid of the
duplicated assert().
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f9b70fa3c41418bc2b28551642ea786ed0c2e79
Author: Vinson Lee <vlee at freedesktop.org>
Date: Mon Jan 13 15:51:50 2014 -0800
egl-static: Fix build error.
Fix build regression introduced with commit
786af2f963925df2c2a6fb60b29a83e8340f03c7.
egl_pipe.c:46:38: fatal error: radeonsi/radeonsi_public.h: No such file or directory
#include "radeonsi/radeonsi_public.h"
^
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73578
Signed-off-by: Vinson Lee <vlee at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa7ae4fd6e24ba7f2b687e3f3c4301919830750b
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 11 16:01:11 2014 +0100
radeonsi: Rename the commonly occurring rscreen variable.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8662e66bf237a820a704df112718be599136098b
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 11 16:00:50 2014 +0100
radeonsi: Rename the commonly occurring rctx/r600 variables.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44d27ce2b2b1b3d2b1c541c3e72374b77cb37b36
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 11 15:59:13 2014 +0100
radeonsi: Rename r600_trace_emit->si_trace_emit.
I had previously considered that unsafe.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b57fc15e13ee6b1f8271927b7334a7ea280624b
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 11 15:56:47 2014 +0100
radeonsi: Rename R600->SI in some remaining defines.
I had previously considered that unsafe.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b79764f495c769f3d56a4229085e313f23c9e3e
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 03:18:42 2014 +0100
radeonsi: Rename radeonsi->si remaining identifiers in si_uvd.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b902298615ffc39acf07dc0b9d3ffb0c72536f71
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 03:18:25 2014 +0100
radeonsi: Rename r600->si remaining identifiers in si_state_draw.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a4b87511ecae187febf1f6a24dfe9056ace0d9e
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 03:14:05 2014 +0100
radeonsi: Rename r600->si remaining identifiers in si_resource.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d068f734ce4e3e59b9f8c34b0c6d3fa016e18bd
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 03:12:19 2014 +0100
radeonsi: Rename r600->si remaining identifiers in si_query.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb0ddb6d5b4697325f083e4fc5f4a8707faca9d5
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 03:07:55 2014 +0100
radeonsi: Rename r600->si remaining identifiers in si_pipe.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=238427625f42915c10538867a7797dc4d657a0ac
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:59:28 2014 +0100
radeonsi: Rename r600->si remaining identifier in si_hw_context.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3160aa4877c510f55eb85d88f45c230d277d9d75
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:53:26 2014 +0100
radeonsi: Rename radeonsi->si remaining identifiers in si_compute.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b7eb4dd1f94357538da1ad17410ffb59d5bf258
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:51:35 2014 +0100
radeonsi: Rename r600->si remaining identifiers in si_blit.c.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=45578def716f17e4588c6567a5fb3b6dc9569aec
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:40:22 2014 +0100
radeonsi: Rename r600->si for functions in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=280c360c0287608227466c6f366606ef5bd62cfa
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:14:42 2014 +0100
radeonsi: Rename r600->si for functions in si.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2a21ed8b9aeb08d019a5aabaf6c581303254308
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 02:05:57 2014 +0100
radeonsi: Rename r600->si for functions in si_resource.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a88f46bc9b9a940e3126c011b43aabde754f0486
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 01:55:08 2014 +0100
radeonsi: Rename r600->si for structs in si_resource.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e81883a4267807d654db8f739a32604d519816c
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Tue Jan 7 01:51:30 2014 +0100
radeonsi: Rename r600->si for structs in si.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=238aeabce0e5cfd850279a68fe0c816adc175294
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 11 15:47:07 2014 +0100
radeonsi: Rename r600->si for structs in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=786af2f963925df2c2a6fb60b29a83e8340f03c7
Author: Andreas Hartmetz <ahartmetz at gmail.com>
Date: Sat Jan 4 18:44:33 2014 +0100
radeonsi: Apply si_* file naming scheme.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ea23763349346f642d8efdf27e1ea05e9b9e2a8
Author: Michał Górny <mgorny at gentoo.org>
Date: Sat Dec 28 15:22:09 2013 +0100
Use AC_PATH_TOOL instead of AC_PATH_PROG for llvm-config.
This should help with cross-compiling and multilib when $CHOST-specific
llvm-config is expected rather than build host default one.
It will help us a bit in Gentoo where we've started using
i686-pc-linux-gnu-llvm-config for 32-bit multilib LLVM.
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=73100
CC: "10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a19bb56e09e841553ad1295f74fa21bfbbe752a
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Sun Jan 5 18:49:03 2014 -0800
configure: Disable xvmc by default
The xvmc unit tests are failing on r300g and r600g.
Reviewed-by: Vinson Lee <vlee at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=277dbf08b0e78fe6cff0fc751768a6f3d33e61f7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 22 03:42:06 2013 -0800
glsl: Remove exec_list iterators now that nothing uses them.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=826d9fb8c030096d94aa3d09180bc76c532cac1b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jan 10 17:08:33 2014 -0800
glsl: Replace iterators in ir_reader.cpp with ad-hoc list walking.
These can't use foreach_list since they want to skip over the first few
list elements. Just doing the ad-hoc list walking isn't too bad.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=48d0faaa4388f411ea64fef8f4be04c22d02a4cf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jan 10 16:39:17 2014 -0800
glsl: Use a new foreach_two_lists macro for walking two lists at once.
When handling function calls, we often want to walk through the list of
formal parameters and list of actual parameters at the same time.
(Both are guaranteed to be the same length.)
Previously, we used a pattern of:
exec_list_iterator 1st_iter = <1st list>.iterator();
foreach_iter(exec_list_iterator, 2nd_iter, <2nd list>) {
...
1st_iter.next();
}
This was awkward, since you had to manually iterate through one of
the two lists.
This patch introduces a foreach_two_lists macro which safely walks
through two lists at the same time, so you can simply do:
foreach_two_lists(1st_node, <1st list>, 2nd_node, <2nd list>) {
...
}
v2: Rename macro from foreach_list2 to foreach_two_lists, as suggested
by Ian Romanick.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=02ff2a275892aa180c84fa2fbb5b44409218c0f3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jan 10 16:13:54 2014 -0800
glsl: Statically cast parameter exec_node to ir_variable.
Formal function parameters are always ir_variable objects, not an
arbitrary ir_instruction. So there's no need to dynamically cast here.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8050584096eec50570bfc0c81926050f27a5dfe5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Nov 23 09:51:52 2013 -0800
glsl: Cast ir_call parameters to ir_rvalue, not ir_instruction.
A function call's parameters are always rvalues. ir_rvalue may not
always be a subclass of ir_instruction in the future, so we should use
the right one.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e113dfab8c7068e083960fcf0b93418c3d79fa3
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jan 10 16:46:26 2014 -0800
glsl: Replace foreach_iter and iter.remove() with foreach_list_safe.
foreach_list_safe allows you to safely remove the current node.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=838a6871bbcd8cd0493bb39b188129f7d49de47e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 22 02:10:15 2013 -0800
glsl: Convert piles of foreach_iter to foreach_list_safe.
In these cases, we edit the list (or at least might be), so we use the
foreach_list_safe variant.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f7e778fa1b1e969a1b15e3650dec49b0026ed08
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Nov 22 01:25:42 2013 -0800
glsl: Convert piles of foreach_iter to the newer foreach_list macro.
foreach_iter and exec_list_iterators have been deprecated for some time now;
we just hadn't ever bothered to convert code to the newer foreach_list
and foreach_list_safe macros.
In these cases, we aren't editing the list, so we can use foreach_list
rather than foreach_list_safe.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb6d9798a0c6eefd512f5b0f19eed34af8f4f257
Author: Paul Berry <stereotype441 at gmail.com>
Date: Fri Jan 10 18:56:14 2014 -0800
i965: Ensure that all necessary state is re-emitted if we run out of aperture.
Prior to this patch, if we ran out of aperture space during
brw_try_draw_prims(), we would rewind the batch buffer pointer
(potentially throwing some state that may have been emitted by
brw_upload_state()), flush the batch, and then try again. However, we
wouldn't reset the dirty bits to the state they had before the call to
brw_upload_state(). As a result, when we tried again, there was a
danger that we wouldn't re-emit all the necessary state. (Note: prior
to the introduction of hardware contexts, this wasn't a problem
because flushing the batch forced all state to be re-emitted).
This patch fixes the problem by leaving the dirty bits set at the end
of brw_upload_state(); we only clear them after we have determined
that we don't need to rewind the batch buffer.
Cc: 10.0 9.2 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df918b5b90c0c1fc564adc026c9da1b8e7003807
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 13:56:30 2014 +0100
r600g: fix glClearBuffer by handling PIPE_CLEAR_COLORi flags correctly
also restructure the code
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e98a17551131e4952cf3e6dda36498415679dc6
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 18:13:24 2014 +0100
r600g: handle NULL colorbuffers correctly on R600-R700
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07032d40684c3ad8e12fd6979b0b4b6582871db4
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 13:31:59 2014 +0100
r600g: handle NULL colorbuffers correctly on Evergreen
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a86de9a72f229e1833af93f5d51023a1dec3af1e
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 01:25:14 2014 +0100
radeonsi: handle NULL colorbuffers correctly
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9677cfab323ef0a24b40711895333685c63258ac
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 01:07:20 2014 +0100
gallium/util: easy fixes for NULL colorbuffers
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9baa45f78b8ca7d66280e36009b6a685055d7cd6
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 01:09:15 2014 +0100
st/mesa: bind NULL colorbuffers as specified by glDrawBuffers
An example why it is required:
Let's say there's a fragment shader writing to gl_FragData[0..1].
The user calls: glDrawBuffers(2, {GL_NONE, GL_COLOR_ATTACHMENT0});
That means gl_FragData[0] is unused and gl_FragData[1] is written
to GL_COLOR_ATTACHMENT0.
st/mesa was skipping the GL_NONE draw buffer, therefore gl_FragData[0]
was written to GL_COLOR_ATTACHMENT0, which was wrong.
This commit fixes it, but drivers must also be fixed not to crash when
binding NULL colorbuffers. There is also a new set of piglit tests for this.
The MSAA state also had to be fixed not to crash when reading fb->cbufs[0].
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bf9578c1b79e5622a2325f1a2bb80fcf0e22a6d
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 8 01:23:43 2014 +0100
mesa: handle GL_NONE draw buffers correctly in glClear
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e549ddb500cf677b6fa16d9ebdfa67cc23da097
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Jan 7 22:00:20 2014 +0100
st/mesa: use sRGB formats for MSAA resolving if destination is sRGB
Copied from the i965 driver, including the big comment.
Cc: 9.2 10.0 <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=355686a69fd10c220afcee3656c5dfb2bc644608
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Dec 27 19:10:03 2013 +0100
st/mesa: check depth and stencil writemask before clearing
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ea3f88c0acc547bbff39d489abda99bc71f376f
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Dec 6 18:58:52 2013 +0100
st/mesa: always prefer pipe->clear over clear_with_quad (v2)
v2: clear depth and stencil together
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c156d245258842c41d1ffac06a08ee7eeb45b33f
Author: Martin Andersson <g02maran at gmail.com>
Date: Thu Dec 26 10:33:28 2013 +0100
st/egl: Flush resources before presentation
Fixes wayland regression on r600g due to fast clear introduced by commit
edbbfac6.
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=99abb87c63a46c2a0ace6c11076e35a0c2d2bc7e
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Wed Jan 8 15:17:59 2014 +0200
dri: set yInverted default to GL_TRUE
yInverted is used by EGL_NOK_texture_from_pixmap to indicate that
window system rendering is y-inverted compared to OpenGL texture
representation. This extension is only known to be used with X11
window system where sane default is GL_TRUE.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73371
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8c5b8a17dae2ee0d63e5456dc76c77436ac1946
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Wed Jan 8 15:17:58 2014 +0200
egl_dri2: call dri2_add_configs_for_visuals after extensions set
dri2_add_config makes decisions based on NOK_texture_from_pixmap so
it needs to be enabled before calling dri2_add_configs_for_visuals.
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2dc35a619c50139d07ad96fc4dfe456e5811c84e
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Thu Jan 9 14:08:55 2014 -0800
mesa: Set the correct error in _mesa_BeginConditionalRender
Piglit was recently changed to expect the correct error code (piglit
commit 271b998), so it started failing on Mesa. This corrects that
failing and adds some spec quotations to justify the errrors set.
The code was rearranged a little bit to match the order listed in the
spec.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db1dc21a75d110344c0a7eccbddcce9c3a1b99d9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Dec 11 14:55:45 2013 -0800
i965: Delete duplicate write_timestamp function.
brw_queryobj.c needs a version of write_timestamp that works on all
generations for the QueryCounter() driver hook. So there's no point in
duplicating it in gen6_queryobj.c.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=532b1fecd93fd30d3b1b101b55fd2c6e074088ad
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 06:29:47 2014 -0800
i965: Fix clears of layered framebuffers with mismatched layer counts.
Previously, Mesa enforced the following rule (from
ARB_geometry_shader4's list of criteria for framebuffer completeness):
* If any framebuffer attachment is layered, all attachments must have
the same layer count. For three-dimensional textures, the layer count
is the depth of the attached volume. For cube map textures, the layer
count is always six. For one- and two-dimensional array textures, the
layer count is simply the number of layers in the array texture.
{ FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_ARB }
However, when ARB_geometry_shader4 was adopted into GL 3.2, this rule
was dropped; GL 3.2 permits different attachments to have different
layer counts. This patch brings Mesa in line with GL 3.2.
In order to ensure that layered clears properly clear all layers, we
now have to keep track of the maximum number of layers in a layered
framebuffer.
Fixes the following piglit tests in spec/!OpenGL 3.2/layered-rendering:
- clear-color-all-types 1d_array mipmapped
- clear-color-all-types 1d_array single_level
- clear-color-mismatched-layer-count
- framebuffer-layer-count-mismatch
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28af1dc21772d0b7819dff6080484c67114dc0d1
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Nov 19 19:01:37 2013 -0800
main: check texture target when validating layered framebuffers.
From section 4.4.4 (Framebuffer Completeness) of the GL 3.2 spec:
If any framebuffer attachment is layered, all populated
attachments must be layered. Additionally, all populated color
attachments must be from textures of the same target.
We weren't checking that the attachments were from textures of the
same target.
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=90368875e733171350c64c8dda52f81bd0705dd0
Author: Chad Versace <chad.versace at linux.intel.com>
Date: Mon Dec 23 17:49:21 2013 -0800
i965/gen6/blorp: Remove redundant HiZ workaround
Commit 1a92881 added extra flushes to fix a HiZ hang in
WebGL Google Maps. With the extra flushes emitted by the previous two
patches, the flushes added by 1a92881 are redundant.
Tested with the same criteria as in 1a92881: by zooming in and out
continuously for 2 hours on Sandybridge Chrome OS (codename
Stumpy) without a hang.
CC: Kenneth Graunke <kenneth at whitecape.org>
CC: Stéphane Marchesin <marcheu at chromium.org>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a5c86f48675d2ca0975d69e0899e72afaab29e5
Author: Chad Versace <chad.versace at linux.intel.com>
Date: Mon Dec 23 17:48:45 2013 -0800
i965/gen6/blorp: Set need_workaround_flush at top of blorp
Unconditionally set brw->need_workaround_flush at the top of gen6 blorp
state emission.
The art of emitting workaround flushes on Sandybridge is mysterious and
not fully understood. Ken and I believe that
intel_emit_post_sync_nonzero_flush() may be required when switching from
regular drawing to blorp. This is an extra safety measure to prevent
undiscovered difficult-to-diagnose gpu hangs.
I verified that on ChromeOS, pre-patch, need_workaround_flush was not
set at the top of blorp, as Paul expected. To verify, I inserted the
following debug code at the top of gen6_blorp_exec(), restarted the ui,
and inspected the logs in /var/log/ui. The abort gets triggered so early
that the browser never appears on the display.
static void
gen6_blorp_exec(...)
{
if (!brw->need_workaround_flush) {
fprintf(stderr, "chadv: %s:%d\n", __FILE__, __LINE__);
abort();
}
...
}
CC: Kenneth Graunke <kenneth at whitecape.org>
CC: Stéphane Marchesin <marcheu at chromium.org>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e0cd58de4261e9dca7a15037192e7e9426a0207
Author: Chad Versace <chad.versace at linux.intel.com>
Date: Mon Dec 23 17:46:51 2013 -0800
i965/gen6/blorp: Set need_workaround_flush immediately after primitive
This patch makes the workaround code in gen6 blorp follow the pattern
established in the regular draw path. It shouldn't result in any
behavioral change.
On gen6, there are two places where we emit 3D_CMD_PRIM: brw_emit_prim()
and gen6_blorp_emit_primitive(). brw_emit_prim() sets
need_workaround_flush immediately after emitting the primitive, but
blorp does not. Blorp sets need_workaround_flush at the bottom of
brw_blorp_exec().
This patch moves the need_workaround_flush from brw_blorp_exec() to
gen6_blorp_emit_primitive(). There is no need to set
need_workaround_flush in gen7_blorp_emit_primitive() because the
workaround applies only to gen6.
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3587fbc586d7c0176d1c0ca33ab807bee5269a76
Author: Carl Worth <cworth at cworth.org>
Date: Thu Jan 9 12:05:28 2014 -0800
docs: Import 10.0.2 release notes, add news item.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=513a324b885689702f32d9ffa1432c4212d899ad
Author: Brian Paul <brianp at vmware.com>
Date: Wed Jan 8 09:05:29 2014 -0700
mesa: add missing SNORM formats in _mesa_base_fbo_format()
We weren't handling the LUMINANCE_SNORM, LUMINANCE_ALPHA_SNORM and
INTENSITY_SNORM cases. Note that adding these cases here does not
require a driver to support rendering to these surface types. If
the driver can't do it we'll report an incomplete framebuffer.
NVIDIA doesn't support GL_EXT_texture_snorm but their driver
accepts these formats in glRenderBufferStorage().
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=689ec8dfb21ae0ea94fc7e0bb9554a8a7aac3003
Author: Brian Paul <brianp at vmware.com>
Date: Tue Jan 7 16:13:56 2014 -0700
mesa: remove dead geom shader code
I doubt the swrast-based drivers will ever support GS.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c47207d517684d3d7b102f2f39f02d37e31d6773
Author: Brian Paul <brianp at vmware.com>
Date: Tue Jan 7 10:50:21 2014 -0700
docs: minor updates to VMware SVGA3D driver page
Signed-off-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d046fd731ab192dceee0916323dd718b78df5976
Author: Brian Paul <brianp at vmware.com>
Date: Tue Jan 7 09:05:27 2014 -0700
mesa: check bits per channel for GL_RGBA_SIGNED_COMPONENTS_EXT query
If a channel has zero bits it's not signed.
v2: also check for luminance and intensity format bits. Bruce
Merry's proposed piglit test hits the luminance case.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=73096
Cc: 10.0 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fc8d7c66e08c295b701586afdc1f6d86eb8a514
Author: Brian Paul <brianp at vmware.com>
Date: Tue Jan 7 09:05:03 2014 -0700
mesa: check for MESA_FORMAT_RGB9_E5_FLOAT in _mesa_is_format_signed()
This packed floating point format only stores positive values.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=73096
Cc: 10.0 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d81d263eeb1cdcc4cb24a6c8d6b9c2dae60fa06e
Author: Brian Paul <brianp at vmware.com>
Date: Thu Jan 9 10:57:22 2014 -0700
st/mesa: fix breakage from gl_constant::Program[] change
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8668eaaa007a1a0b23a4bc39469d6dba293b7da9
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 11:09:58 2014 -0800
mesa: Use functions to convert gl_shader_stage to PROGRAM enum or pipe target.
Suggested-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
v2: Improve assert message.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e654216ac7ec2d254685d0ff5f437917747c9bd3
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 10:32:18 2014 -0800
main: Change init_program_limits() to use gl_shader_stage.
This allows the caller to execute it in a loop rather than
hand-rolling a separate call for each stage.
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bce8bc0b250c7d64ac7898ba032858963dee6a37
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 10:17:01 2014 -0800
glsl: Index into ctx->Const.Program[] rather than using ad-hoc code.
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b539385789a95074cc53c9e16988d2384ec5c7de
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 10:17:01 2014 -0800
mesa: Index into ctx->Const.Program[] rather than using ad-hoc code.
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=84732a982c3eeaca2e2809532c8422dc5f7045c1
Author: Paul Berry <stereotype441 at gmail.com>
Date: Wed Jan 8 10:00:28 2014 -0800
mesa: replace ctx->Const.{Vertex,Fragment,Geomtery}Program with an array.
These are replaced with
ctx->Const.Program[MESA_SHADER_{VERTEX,FRAGMENT,GEOMETRY}]. In
patches to follow, this will allow us to replace a lot of ad-hoc logic
with a variable index into the array.
With the exception of the changes to mtypes.h, this patch was
generated entirely by the command:
find src -type f '(' -iname '*.c' -o -iname '*.cpp' -o -iname '*.py' \
-o -iname '*.y' ')' -print0 | xargs -0 sed -i \
-e 's/Const\.VertexProgram/Const.Program[MESA_SHADER_VERTEX]/g' \
-e 's/Const\.GeometryProgram/Const.Program[MESA_SHADER_GEOMETRY]/g' \
-e 's/Const\.FragmentProgram/Const.Program[MESA_SHADER_FRAGMENT]/g'
Suggested-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b96be595b93544266436ec3b22b2cbd349d180c
Author: José Fonseca <jfonseca at vmware.com>
Date: Wed Jan 8 17:19:41 2014 +0000
llvmpipe: Honour pipe_rasterizer::point_quad_rasterization.
Commit eda21d2a3010d9fc5a68b55a843c5e44b2abf8dd fixed the rasterization
of points for Direct3D but ended up breaking the rasterization of OpenGL
non-sprite points, in particular conform's pntrast.c test.
The only way to get both working is to properly honour
pipe_rasterizer::point_quad_rasterization, and follow the weird OpenGL
rule when it is false.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f46563fe1c8a5560e4de0adf03e3d8770b7fc734
Author: Eric Anholt <eric at anholt.net>
Date: Tue Dec 24 15:11:54 2013 -0800
i965: Don't do the temporary-and-blit-copy for INVALIDATE_RANGE maps.
We definitely want to fall through to the unsynchronized map case, instead
of wasting bandwidth on a copy. Prevents a -43.2407% +/- 1.06113% (n=49)
performance regression on aa10perf when teaching glamor to provide the
GL_INVALIDATE_RANGE_BIT information.
This is a performance fix, which I usually wouldn't cherry-pick to stable.
But this was really was just a bug in the code, its presence would
discourage developers from giving us the best information they can, and I
think we've got fairly high confidence in the unsynchronized map path
already.
Cc: 10.0 9.2 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e186b927b8254ce62e0d47db90d16cd4253b3db5
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 12:11:25 2013 -0800
i965: Fix handling of MESA_pack_invert in blit (PBO) readpixels.
Fixes piglit GL_MESA_pack_invert/readpixels and GPU hangs with glamor and
cairo-gl.
Cc: 10.0 9.2 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4b222ac135c28a3bc95cc0d9fd29378540c8def
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 01:56:26 2013 -0800
i965: Fix incorrect bounds tracking for blit readpixels's GPU access.
While incorrect, it probably wouldn't affect anyone ever: You'd have to do
an appropriately-formatted readpixels into a PBO, then overwrite the tail
end of the updated area of the PBO with glBufferSubData(), and you
wouldn't get appropriate synchronization.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=66524daf175950bd7266fc3cbb4125c24984a482
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 01:48:09 2013 -0800
i965: Use SET_FIELD to safety check our x/y offsets in blits.
The earlier assert made sure that our math didn't exceed our bounds, but
this makes sure that we don't overflow from the high bits X into the low
bits of Y. We've already put checks in intel_miptree_blit(), but I've
wanted to expand the type in our protoype from short to uint32_t, and we
could get in trouble with intel_emit_linear_blit() if we did.
v2: Add Ken's comment about the funny language extension used.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v1)
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com> (v1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d2e86924ebe7b520a5964e9c90c5bb7213c67cf
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 01:39:42 2013 -0800
i965: Add an assert for when SET_FIELD's value exceeds the field size.
This was one of the things we always wanted to do to this, to make it more
useful than just (value << FIELD_MASK).
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=98cdb2ceede34ad04cd8f65691bd96fbb44bcced
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 01:26:56 2013 -0800
i965: Add a safety check for emitting blits.
With all of the flipping and pitch twiddling and miptree layout involved
in our blits, there are lots of ways for us to scribble outside of a
buffer. Put in a check that we're not about to do so.
This catches a bug that glamor was running into.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdc5241af4aa9afbd66f6c96ee6d20e09f77ea89
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 23 15:30:03 2013 -0800
i965: Don't call the blitter on addresses it can't handle.
Noticed by tex3d-maxsize on my next commit to check that our addresses
don't overflow.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8ff08edd823ddf6b0e07ef84d2ba8afc3abbc34
Author: Thomas Sondergaard <ts at medical-insight.com>
Date: Tue Jan 7 13:31:00 2014 -0700
mesa: Namespace qualify fma to override ambiguity with fma from math.h
MSVC 2013 version of math.h includes an fma() function.
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fcddd325ce3dc5dfdafc95767542590ae860c45
Author: Thomas Sondergaard <ts at medical-insight.com>
Date: Tue Jan 7 13:31:00 2014 -0700
mesa: Work around internal compiler error
This small rearrangement avoids MSVC 2013 ICE. Also, this should be
a better memory access order.
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=067ad6e53ec2545970b7698d06d2a537da194678
Author: Thomas Sondergaard <ts at medical-insight.com>
Date: Tue Jan 7 13:31:00 2014 -0700
mesa: Fix compile error with MSVC 2013
This fixes the following compile error:
src\glsl\ir_constant_expression.cpp(1405) : error C2666: 'copysign' : 3
overloads have similar conversions
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20e65c92c760404560be629354999314632f8674
Author: Thomas Sondergaard <ts at medical-insight.com>
Date: Tue Jan 7 13:31:00 2014 -0700
mesa: Preliminary support for MSVC_VERSION=12.0
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=646c16af6e23184078995bcd3fc3db00b7c21250
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 7 21:39:13 2014 -0500
freedreno: add basic query support
Add for now some simple/basic query support (ie. things not actually
requiring the GPU). Might change around a bit when I actually add
GPU queries, but for now this enables some useful performance info
in the GALLIUM_HUD. For example:
GALLIUM_HUD=fps+batches+batches-sysmem+batches-gmem+restores,draw-calls
The driver specific specific queries are:
+ draw-calls
+ batches - number of batches per second, sum of batches-sysmem
plus batches-gmem
+ batches-gmem - render a set of tiles in GMEM, for each tile
(optionally) system mem -> gmem (restore), plus N draws,
plus gmem -> system mem (resolve) per second
+ batches-sysmem - N draws to system memory (GMEM bypass) per
second
+ restores - number of GMEM batches that required restore per
second
Ideally for GMEM rendering, you want batches-gmem to equal fps. If
the app is doing something that triggers multiple passes (ie. requires
extra round trip gmem <-> system memory) then the # of batches per
second will go up relative to fps.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=725d736f6a6a14d10223888d585ddab80ee803f0
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jan 8 10:06:52 2014 -0500
freedreno/a3xx: use cs patch instead of RFI+RMW
Since we now have the cmdstream patch mechanism needed for hw binning,
might as well also use it for RB_RENDER_CONTROL updates. This avoids
the need to use RMW (and associated WFI) to update RB_RENDER_CONTROL.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0766528baaef48902c87bbdaa4f5926c472269b
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 7 10:55:07 2014 -0500
freedreno/a3xx: support for hw binning pass
The binning pass sorts vertices into which bins/tiles they apply to.
The visibility information generated during the binning pass can be
used to speed up the rendering pass by filtering out vertices which
do not apply to the current tile. See:
https://github.com/freedreno/freedreno/wiki/Adreno-tiling#optimized-approach
This brings a significant fps boost. A rough assortment of tests
(supertuxkart, etracer, tremulous, glmark2 'build' test, etc) seems
to yield a ~35-45% fps improvement.
For now, to be conservative, the binning pass is not enabled yet by
default. To enable it use:
FD_MESA_DEBUG=binning
So far I haven't found anything that breaks with binning enabled,
but I'd like a bit more testing before I enable it as default.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfb44c24bc1eff850d47984b2cb60c957ffc143d
Author: Rob Clark <robclark at freedesktop.org>
Date: Fri Dec 27 10:31:22 2013 -0500
freedreno: be more clever about gmem usage
Only need to leave room for depth/stencil if it is actually used, etc.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42c5e2a2ed1888d67d89de5b48749a8228a8f167
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Jan 7 09:49:42 2014 -0500
freedreno: resync generated headers
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e99735f301ebf85f8d0bfdce2bad441a5aac7f8
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Wed Dec 18 21:27:59 2013 +1300
i965: fold offset into coord for textureOffset(gsampler2DRect)
The hardware is broken with nonzero texel offsets and unnormalized
coordinates; instead of doing correct offsetting, we get garbage.
This just extends the existing workaround for ir_txf and
ir_tg4+gsampler2DRect to also consider ir_tex+gsampler2DRect.
Fixes broken rendering in 'tesseract' when 'mesa_texrectoffset_bug' is
not enabled; also fixes the new piglit test
'tests/spec/glsl-1.30/execution/fs-textureOffset-Rect'.
Has been broken ~forever; suggesting including this in only 10.0 because
the lowering pass doesn't exist in 9.2 or earlier so would require quite
a different patch.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: Lee Salzman <lsalzman at gmail.com>
Cc: "10.0" <mesa-stable at lists.freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31ec2f83385c4f13c9c8831a90db982883bbedcd
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 11:40:00 2014 -0800
mesa: Remove _mesa_progshader_enum_to_string(), which is no longer used.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=acfc58a7e593cdb377527c8b84e2fd9bf5906079
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 11:23:34 2014 -0800
glsl: Make more use of gl_shader_stage enum in ir_set_program_inouts.cpp.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2adb9fea77140fccb7bd3f7a547f026c050333bd
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 11:19:22 2014 -0800
glsl: Make more use of gl_shader_stage enum in lower_clip_distance.cpp.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80ee24823f9faeb95c46ec2bc899bb828a923c3b
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 11:13:32 2014 -0800
glsl: Make more use of gl_shader_stage enum in link_varyings.cpp.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
v2: Also rename "shaderType" param of is_varying_var() to "stage".
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=911007820962d78a60c8056f64c0bde1ea724149
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 09:46:10 2014 -0800
glsl: Change _mesa_glsl_parse_state ctor to use gl_shader_stage enum.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
v2: Also rename "target" param to "stage".
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3b86f07da4ba9a4db6b8aae4072af6f1638b7cc
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 10:58:56 2014 -0800
mesa: Use gl_shader::Stage instead of gl_shader::Type where possible.
This reduces confusion since gl_shader::Type is sometimes
GL_SHADER_PROGRAM_MESA but is more frequently
GL_SHADER_{VERTEX,GEOMETRY,FRAGMENT}. It also has the advantage that
when switching on gl_shader::Stage, the compiler will alert if one of
the possible enum types is unhandled. Finally, many functions in
src/glsl (especially those dealing with linking) already use
gl_shader_stage to represent pipeline stages; using gl_shader::Stage
in those functions avoids the need for a conversion.
Note: in the process I changed _mesa_write_shader_to_file() so that if
it encounters an unexpected shader stage, it will use a file suffix of
"????" rather than "geom".
Reviewed-by: Brian Paul <brianp at vmware.com>
v2: Split from patch "mesa: Store gl_shader_stage enum in gl_shader objects."
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=65511e5f22e2ba0a5ebd9210319a55d80ea5334e
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 10:58:56 2014 -0800
mesa: Store gl_shader_stage enum in gl_shader objects.
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1722f5e73ee73e7c2ab58a4be39c95c2a55b154f
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 10:58:56 2014 -0800
mesa: Move declaration of gl_shader_stage earlier in mtypes.h.
Also move the related #define MESA_SHADER_STAGES. This will allow
gl_shader_stage to be used in struct gl_shader.
Reviewed-by: Brian Paul <brianp at vmware.com>
v2: Split from patch "mesa: Store gl_shader_stage enum in gl_shader objects."
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72a995d30721246476c94f95c7df10838fe7f69a
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 10:58:56 2014 -0800
glsl: make _mesa_shader_stage_to_string() available to non-C++ code.
Reviewed-by: Brian Paul <brianp at vmware.com>
v2: Split from patch "mesa: Store gl_shader_stage enum in gl_shader objects."
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=665b8d7b6d8eae03c9dc0ef1a744fe59d9cc6cb6
Author: Paul Berry <stereotype441 at gmail.com>
Date: Tue Jan 7 10:11:39 2014 -0800
mesa: Clean up nomenclature for pipeline stages.
Previously, we had an enum called gl_shader_type which represented
pipeline stages in the order they occur in the pipeline
(i.e. MESA_SHADER_VERTEX=0, MESA_SHADER_GEOMETRY=1, etc), and several
inconsistently named functions for converting between it and other
representations:
- _mesa_shader_type_to_string: gl_shader_type -> string
- _mesa_shader_type_to_index: GLenum (GL_*_SHADER) -> gl_shader_type
- _mesa_program_target_to_index: GLenum (GL_*_PROGRAM) -> gl_shader_type
- _mesa_shader_enum_to_string: GLenum (GL_*_{SHADER,PROGRAM}) -> string
This patch tries to clean things up so that we use more consistent
terminology: the enum is now called gl_shader_stage (to emphasize that
it is in the order of pipeline stages), and the conversion functions are:
- _mesa_shader_stage_to_string: gl_shader_stage -> string
- _mesa_shader_enum_to_shader_stage: GLenum (GL_*_SHADER) -> gl_shader_stage
- _mesa_program_enum_to_shader_stage: GLenum (GL_*_PROGRAM) -> gl_shader_stage
- _mesa_progshader_enum_to_string: GLenum (GL_*_{SHADER,PROGRAM}) -> string
In addition, MESA_SHADER_TYPES has been renamed to MESA_SHADER_STAGES,
for consistency with the new name for the enum.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
v2: Also rename the "target" field of _mesa_glsl_parse_state and the
"target" parameter of _mesa_shader_stage_to_string to "stage".
Reviewed-by: Brian Paul <brianp at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eda21d2a3010d9fc5a68b55a843c5e44b2abf8dd
Author: José Fonseca <jfonseca at vmware.com>
Date: Tue Jan 7 17:57:59 2014 +0000
llvmpipe: Fix the bottom_edge_rule adjustment for points.
The adjustment needs to be applied to the y coordinates and not the x
coordinates, just like the equivalent code for lines and triangles in
lp_setup_line.c and lp_setup_tri.c.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Zack Rusin <zackr at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=37de6b06821b208920ccf6fb99fbc727d0344004
Author: José Fonseca <jfonseca at vmware.com>
Date: Tue Jan 7 17:52:21 2014 +0000
llvmpipe: Respect bottom_edge_rule when computing the rasterization bounding boxes.
This was inadvertently forgotten when replacing gl_rasterization_rules
with lower_left_origin and half_pixel_center (commit
2737abb44efebfa10ac84b183c20fc5818d1514e).
This makes a difference when lower_left_origin != half_pixel_center, e.g,
D3D10.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Zack Rusin <zackr at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76edf44f9ed7ea8d8e8f44d0d01b5ed26606903e
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Mon Jan 6 23:32:46 2014 +0800
ilo: enable HiZ
The support is still early. Fast depth buffer clear is not enabled yet.
HiZ can be forced off with ILO_DEBUG=nohiz.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7b4219e2287f98a323b6883ce5f42545cab0e8f
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Tue Jan 7 11:57:42 2014 +0800
ilo: resolve Z/HiZ correctly
When the depth buffer is to be read, perform a Depth Buffer Resolve if it has
been rendered. When the depth buffer is to be rendered, perform a HiZ Buffer
Resolve when the depth buffer is modified externally.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77e3db464f108531e5d4b3a7547aca234b5619d6
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Thu Dec 26 12:03:44 2013 +0800
ilo: add flags to texture slices
The flags are used to mark who (CPU, BLT, or RENDER) has accessed the resource
and how (READ or WRITE).
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=846f70a6ef8be5297eb6f4cf9cf8dc36ce22b818
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Thu Dec 26 11:46:25 2013 +0800
ilo: rename and add an accessor for texture slices
Rename ilo_texture::slice_offsets to ilo_texture::slices and add an accessor,
ilo_texture_get_slice().
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=127fbc086ba9365e9304843af09fe730edb1d389
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Sat Dec 28 15:57:49 2013 +0800
ilo: add HiZ op support to the pipelines
Add blitter functions to perform Depth Buffer Clear, Depth Buffer Resolve, and
Hierarchical Depth Buffer Resolve. Those functions set ilo_blitter up and
pass it to the pipelines to emit the commands.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=546416d49597c4879d045707d5587317e77e160c
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Mon Jan 6 23:32:32 2014 +0800
ilo: add support for HiZ allocation
Add tex_create_hiz() to create HiZ bo. It is not really called yet.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e372819589c2a66620e63a2cd11582c6ce5fb8f0
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Sat Dec 21 21:21:24 2013 +0800
ilo: refactor separate stencil allocation
Move separate stencil allocation code to tex_create_separate_stencil to keep
tex_create sane.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82676f5d3443392a0ae0186c8b7f7dce53a44fbc
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Mon Jan 6 23:32:56 2014 +0800
ilo: assorted GPE fixes for HiZ
Allow HiZ op to be specified in 3DSTATE_WM. Pass depth format directly in
gen7_emit_3DSTATE_SF. Use tex->hiz.bo to determine if HiZ exists. Fix
3DSTATE_SF for the case when there is no ilo_rasterizer_state. Fix
3DSTATE_PS for the case when there is no ilo_shader_state.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6642381e7513926b847d6bc10bf590e1c0c54859
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Sat Dec 21 20:09:49 2013 +0800
ilo: no layer offsetting on GEN7+
Even though the Ivy Bridge PRM lists some restrictions that require layer
offsetting as the Sandy Bridge PRM does, it seems they are actually lifted.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=011fde4bf2b4337cb07ddc1af8b4398fef9b3648
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Fri Dec 20 14:45:59 2013 +0800
ilo: offset to layers only when necessary
GEN6 has several requirements regarding the LOD/Depth/Width/Height of the
render targets and the depth buffer. We used to offset to the layers in
question unconditionally to meet the requirements. With this commit,
offseting is done only when the requirements are not met.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a2a221d019651c98dabe6773e56118ae0009f8d
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Sat Dec 21 00:31:33 2013 +0800
ilo: allow ilo_zs_surface to skip layer offsetting
Make offset to layer optional in ilo_gpe_init_zs_surface.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d9f5d57e25af3de0e35e5c7f3c0bff03b080ba7
Author: Chia-I Wu <olvaffe at gmail.com>
Date: Fri Dec 20 23:59:34 2013 +0800
ilo: allow ilo_view_surface to skip layer offsetting
Make offset to layer optional in ilo_gpe_init_view_surface_for_texture.
render_cache_rw is always the same as is_rt and is replaced.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0978a6966abb886539158934d11ae7f170786be2
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Jan 7 10:25:40 2014 +0200
i965/fs: do SEL optimization only when src type for MOV matches
Fixes a bug where then branch operates with ivec4 while else uses vec4.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72379
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
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