Mesa (master): i965/fs: Add a comment explaining how register coalescing works.

[Matt Turner]

Module: Mesa
Branch: master
Commit: 9bb4d71fd2ff8ed24cb4d1485df1f1ff667bcb3c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bb4d71fd2ff8ed24cb4d1485df1f1ff667bcb3c

Author: Matt Turner <mattst88 at gmail.com>
Date:   Tue Dec 10 16:05:19 2013 -0800

i965/fs: Add a comment explaining how register coalescing works.

Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

---

 src/mesa/drivers/dri/i965/brw_fs.cpp |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 3fdb3c9..ed7f574 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2256,6 +2256,18 @@ fs_visitor::dead_code_eliminate_local()
  * Implements register coalescing: Checks if the two registers involved in a
  * raw move don't interfere, in which case they can both be stored in the same
  * place and the MOV removed.
+ *
+ * To do this, all uses of the source of the MOV in the shader are replaced
+ * with the destination of the MOV. For example:
+ *
+ * add vgrf3:F, vgrf1:F, vgrf2:F
+ * mov vgrf4:F, vgrf3:F
+ * mul vgrf5:F, vgrf5:F, vgrf4:F
+ *
+ * becomes
+ *
+ * add vgrf4:F, vgrf1:F, vgrf2:F
+ * mul vgrf5:F, vgrf5:F, vgrf4:F
  */
 bool
 fs_visitor::register_coalesce()