Mesa (master): 34 new commits
Maarten Lankhorst
mlankhorst at kemper.freedesktop.org
Mon Jan 27 15:41:48 UTC 2014
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3518606c149393a656a653459972ef35aa527c55
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Jan 21 00:26:14 2014 -0500
docs: sync up nv50/nvc0 status on GL4.x extensions
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=59e334194bc245e90550340607e1d082b33e9213
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 15 06:05:44 2014 -0500
docs: update GL3.txt, relnotes to reflect current nv50/nvc0 status
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=839bd3cff7d1c9ac088e8b5b9e7e87556598239f
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 15 05:48:51 2014 -0500
nv50, nvc0: update reported glsl version to 330
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3efed4cd050e448ec168e2c0c27068a1f5a6c20c
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Thu Dec 26 19:06:25 2013 +0100
mesa/st: expose ARB_texture_rgb10_a2ui if R10G10B10A2_UINT is supported v2
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7b14ba23f3f92ed941484d929a9b799efb9e925
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Wed Dec 25 17:53:50 2013 +0100
nv50: add more RGB10A2 formats
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3bd2bc7b2c59ea8f2a6f83fb44ef4614f481d57
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Wed Dec 25 17:53:49 2013 +0100
st/mesa: fix GS varyings for PIPE_CAP_TGSI_TEXCOORD
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc8da4c29bc44731df1077d468fb9354bb51928a
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Nov 29 01:17:25 2013 -0500
nv50: enable seamless cube maps on all hw
Some of the hardware support is missing. The NVIDIA-provided driver,
which claims seamless cube map support fails the relevant tests as well.
As this is the last extension before we can have OpenGL 3.2, doing this
allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9b7cfbabf740d0b916cafb97b2c9e755c606d84
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Nov 25 13:56:12 2013 -0500
nv50: report glsl 1.50 now that gp tests pass
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bd40073b9803baf62f77ed5ac79979e037d2ed6
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jan 12 03:32:30 2014 -0500
nv50: add support for texelFetch'ing MS textures, ARB_texture_multisample
Creates two areas in the AUX constbuf:
- Sample offsets for MS textures
- Per-texture MS settings
When executing a texelFetch with a MS sampler, looks up that texture's
settings and adjusts the parameters given to the texfetch instruction.
With this change, all the ARB_texture_multisample piglits pass, so turn
on PIPE_CAP_TEXTURE_MULTISAMPLE.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6cf950ba27236f8270a99288272628cf2cf00c5
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jan 12 21:51:04 2014 -0500
nv50: copy nvc0's get_sample_position implementation
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b87f5abd218c4a0dc530be6ca387ae6f20970fb7
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jan 12 23:23:44 2014 -0500
nv50: add comments about CB_AUX contents
Updates a few inconsistencies as well, like the size of the buffer,
location of the runout, etc.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=250e7c835e6330cc792cbbb8ebff8b40daea724b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jan 12 04:51:09 2014 -0500
nvc0: don't forget to also clear additional layers
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3247355cc1a02f5fb39f18782ff26412d450826
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jan 12 04:45:22 2014 -0500
nv50: don't forget to also clear additional layers
Fixes most of the tests/spec/gl-3.2/layered-rendering/* piglits.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d98b85b50713c12e1970da08220f124b26feaab0
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Jan 13 13:36:28 2014 -0500
nv50: allocate an extra code bo to avoid dmesg spam
Each code BO is a heap that allocates at the end first, and so GPs are
allocated at the very end of the allocated space. When executing, we see
PAGE_NOT_PRESENT errors for the next page. Just over-allocate to make
sure that there's something there.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58589f6c6d02f6a8b2fe4a049779129064faf2c0
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 11 23:26:03 2014 -0500
nv50: GP_REG_ALLOC_RESULT must be positive
Set max_out to 1 when there are no outputs.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=006095b38af8ce80c678941d3fbe9b9509067c3a
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 11 21:04:52 2014 -0500
nv50: VP_RESULT_MAP_SIZE has to be positive
Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4adbd5a579a0b5952674106c1a4e0420209b321
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 15 03:49:57 2014 -0500
nv50: enable primitive id generation when it is an FP input without GP
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70a07ac35269c037adb2b724df28357b7f87efb1
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 15 03:47:48 2014 -0500
nv50: handle gl_Layer writes in GP
Marks gl_Layer as only having one component, and makes sure to keep
track of where it is and emit it in the output map, since it is not an
input to the FP.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c624148a699eb660565498ff91685be4d0f1c35
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 11 20:12:18 2014 -0500
nv50: properly set the PRIMITIVE_ID enable flag when it is a gp input.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f3219a8f34296cfd21c165ca4d41d7e62bb4cf5
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 11 19:42:04 2014 -0500
nv50/ir: add support for gl_PrimitiveIDIn
Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.
Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f77069419a644e57d3f1baf708a58c699fa16ca5
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 18 03:18:19 2014 -0500
nv50/ir: fix support for shader input + immediate in gp
This only works for up to $a3, hopefully we won't go that high.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=45b7f1701e4c4d0e3c5a2863fe90686daa6524ce
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Jan 10 22:17:04 2014 -0500
nv50/ir: disallow shader input + cbuf in same instruction in gp
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42dc414cc6306a51d6b290e72e687b0ad82d5830
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Nov 25 03:19:06 2013 -0500
nv50/ir: disallow predicates on emit/restart ops
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20929963d389c237f50192a75157cbc98c57c8d3
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Nov 25 03:18:34 2013 -0500
nv50: allow vert_count to be >255
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=02b317a0d601ab50cedad31f2b52da3bdc3a5aad
Author: Bryan Cain <bryancain3 at gmail.com>
Date: Wed Apr 17 15:55:47 2013 -0500
nv50: add support for geometry shaders
Layer output probably doesn't work yet, but other than that everything seems
to be working.
Signed-off-by: Bryan Cain <bryancain3 at gmail.com>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3f82e1a63e8a58f0e7ac297fc5e94ebe76c3339
Author: Bryan Cain <bryancain3 at gmail.com>
Date: Wed Apr 17 15:55:46 2013 -0500
nv50/ir: delay calculation of indirect addresses
Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used. This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.
Signed-off-by: Bryan Cain <bryancain3 at gmail.com>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=67250acbaba924ccaab696f2b348dfa898c41d0b
Author: Christoph Bumiller <e0425955 at student.tuwien.ac.at>
Date: Thu Apr 4 22:57:42 2013 +0200
nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2689b59cabc26a20c5d72576a12d789edbfd4b4e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 18 22:19:16 2014 -0500
nv50/ir: txg not available on nvaa/nvac
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e05de038bf651220b529c386d88039636aacd410
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Thu Jan 16 18:52:49 2014 -0500
nv50, nvc0: only clear out the buffers that we were asked to clear
Fixes fbo-drawbuffers-none glClearBuffer piglit test.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c75eeab60936810eb1a2641961b5ecf6f77a2abd
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 15 02:14:06 2014 -0500
nv50, nvc0: clear out RT on a null cbuf
This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).
This implementation is highly based on a larger commit by
Christoph Bumiller <e0425955 at student.tuwien.ac.at> in his gallium-nine
branch.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f264e16e29a870b4b3b605590c718c35bb1a91c
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jan 11 22:03:19 2014 -0500
nv50: don't leak heap on tls alloc failure
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=18d97a8df776863c89c52294055160a17fc0f9e6
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Jan 10 17:58:37 2014 -0500
nouveau/codegen: set dType to S32 for OP_NEG U32
It doesn't make sense to do an OP_NEG from U32 to U32. This was
manifested on nv50 in glsl-fs-atan-3 which was generating a
UMAD TEMP[0].x, TEMP[0].xxxx, -TEMP[5].xxxx, TEMP[0].xxxx
instruction. (For some reason, nvc0 causes a different shader to be
generated.) This led to a
cvt neg u32 $r1 u32 $r1
Which did not yield the desired result. This changes the final output to
cvt neg s32 $r1 u32 $r1
which produces the desired output and the piglit tests passes. My
assumption is that this is also what we want on nvc0, but could not test
as there was no suitable shader that generated the problem instruction.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=45b64e52f4df49ac01ac100fba2c01633d492a6d
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jan 22 21:30:07 2014 -0500
util/u_vbuf: correct map offset calculation for crazy offsets
When the min_index is very large (or very negative), the multipliation
can overflow 32 bits and result in an incorrect map pointer
modification.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3de97ce9200e9fe96891e7e92ec83f0fc38d8693
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Jan 21 19:45:18 2014 -0500
translate: deal with size overflows by casting to ptrdiff_t
This was discovered as a result of the draw-elements-base-vertex-neg
piglit test, which passes very negative offsets in, followed up by large
indices. The nouveau code correctly adjusts the pointer, but the
translate code needs to do the proper inverse correction. Similarly fix
up the SSE code to do a 64-bit multiply to compute the proper offset.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Brian Paul <brianp at vmware.com>
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