Mesa (master): nvc0/ir: fix encoding of offset register into interpolation instruction
Ilia Mirkin
imirkin at kemper.freedesktop.org
Thu Jul 10 01:32:45 UTC 2014
Module: Mesa
Branch: master
Commit: a432079400f63c44fadb11b93c3ff8fb916159cf
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a432079400f63c44fadb11b93c3ff8fb916159cf
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Jul 5 19:30:50 2014 -0400
nvc0/ir: fix encoding of offset register into interpolation instruction
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index 84c2c6b..dfb093c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1561,7 +1561,7 @@ CodeEmitterNVC0::emitINTERP(const Instruction *i)
defId(i->def(0), 14);
if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
- srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 17);
+ srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 17);
else
code[1] |= 0x3f << 17;
}
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