Mesa (master): radeonsi: partially revert " switch descriptors to i32 vectors"

Marek Olšák mareko at kemper.freedesktop.org
Mon Jul 14 19:40:29 UTC 2014


Module: Mesa
Branch: master
Commit: d859bdb4b5beee8059d3e5c0f789dd8ae4061c4a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d859bdb4b5beee8059d3e5c0f789dd8ae4061c4a

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jul 14 19:40:14 2014 +0200

radeonsi: partially revert "switch descriptors to i32 vectors"

It indeed breaks LLVM 3.4.2.

---

 src/gallium/drivers/radeonsi/si_shader.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 9ff08a5..563365b 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1989,6 +1989,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
 			emit_data->args, emit_data->arg_count,
 			LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 	} else {
+		LLVMTypeRef i8, v16i8, v32i8;
 		const char *name;
 
 		switch (opcode) {
@@ -2016,6 +2017,17 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
 			return;
 		}
 
+		i8 = LLVMInt8TypeInContext(base->gallivm->context);
+		v16i8 = LLVMVectorType(i8, 16);
+		v32i8 = LLVMVectorType(i8, 32);
+
+		emit_data->args[1] = LLVMBuildBitCast(base->gallivm->builder,
+						emit_data->args[1], v32i8, "");
+		if (opcode != TGSI_OPCODE_TXF) {
+			emit_data->args[2] = LLVMBuildBitCast(base->gallivm->builder,
+						emit_data->args[2], v16i8, "");
+		}
+
 		sprintf(intr_name, "%s.v%ui32", name,
 			LLVMGetVectorSize(LLVMTypeOf(emit_data->args[0])));
 




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