Mesa (master): i965/skl: Implement workaround for VF Invalidate issue

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 5745aaf15cf185d56da680980aaa1ba537f3eb44
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5745aaf15cf185d56da680980aaa1ba537f3eb44

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Thu May  1 11:03:09 2014 -0700

i965/skl: Implement workaround for VF Invalidate issue

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>

---

 src/mesa/drivers/dri/i965/intel_batchbuffer.c |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 71dc268..cd45af6 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -648,6 +648,15 @@ intel_batchbuffer_emit_mi_flush(struct brw_context *brw)
    } else {
       int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_WRITE_FLUSH;
       if (brw->gen >= 6) {
+         if (brw->gen == 9) {
+            /* Hardware workaround: SKL
+             *
+             * Emit Pipe Control with all bits set to zero before emitting
+             * a Pipe Control with VF Cache Invalidate set.
+             */
+            brw_emit_pipe_control_flush(brw, 0);
+         }
+
          flags |= PIPE_CONTROL_INSTRUCTION_FLUSH |
                   PIPE_CONTROL_DEPTH_CACHE_FLUSH |
                   PIPE_CONTROL_VF_CACHE_INVALIDATE |