Mesa (master): i965/fs: Set MUL source type to W/ UW in 64-bit mul macro on Gen8.
Matt Turner
mattst88 at kemper.freedesktop.org
Wed Oct 1 00:10:02 UTC 2014
Module: Mesa
Branch: master
Commit: 05586f9bc1c5649298675361556936e684ad68eb
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05586f9bc1c5649298675361556936e684ad68eb
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Sep 27 17:34:51 2014 -0700
i965/fs: Set MUL source type to W/UW in 64-bit mul macro on Gen8.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 89ac7e2..6b41045 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -654,8 +654,29 @@ fs_visitor::visit(ir_expression *ir)
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
this->result.type);
- emit(MUL(acc, op[0], op[1]));
+ fs_inst *mul = emit(MUL(acc, op[0], op[1]));
emit(MACH(this->result, op[0], op[1]));
+
+ /* Until Gen8, integer multiplies read 32-bits from one source, and
+ * 16-bits from the other, and relying on the MACH instruction to
+ * generate the high bits of the result.
+ *
+ * On Gen8, the multiply instruction does a full 32x32-bit multiply,
+ * but in order to do a 64x64-bit multiply we have to simulate the
+ * previous behavior and then use a MACH instruction.
+ *
+ * FINISHME: Don't use source modifiers on src1.
+ */
+ if (brw->gen >= 8) {
+ assert(mul->src[1].type == BRW_REGISTER_TYPE_D ||
+ mul->src[1].type == BRW_REGISTER_TYPE_UD);
+ if (mul->src[1].type == BRW_REGISTER_TYPE_D) {
+ mul->src[1].type = BRW_REGISTER_TYPE_W;
+ } else {
+ mul->src[1].type = BRW_REGISTER_TYPE_UW;
+ }
+ }
+
break;
}
case ir_binop_div:
More information about the mesa-commit
mailing list