Mesa (master): r600g, radeonsi: Only set use_staging_texture = TRUE once

[Michel Dänzer]

Module: Mesa
Branch: master
Commit: 159f93cf398fd301345f82ee0b10300cc523962b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=159f93cf398fd301345f82ee0b10300cc523962b

Author: Michel Dänzer <michel.daenzer at amd.com>
Date:   Wed Oct  8 16:05:36 2014 +0900

r600g,radeonsi: Only set use_staging_texture = TRUE once

No need to check for setting the flag after we set it already.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeon/r600_texture.c |   13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 13df495..1d4e966 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -924,19 +924,16 @@ static void *r600_texture_transfer_map(struct pipe_context *ctx,
 	 * the CPU is much happier reading out of cached system memory
 	 * than uncached VRAM.
 	 */
-	if (rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D)
+	if (rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D) {
 		use_staging_texture = TRUE;
-
-	/* Untiled buffers in VRAM, which is slow for CPU reads */
-	if ((usage & PIPE_TRANSFER_READ) && !(usage & PIPE_TRANSFER_MAP_DIRECTLY) &&
+	} else if ((usage & PIPE_TRANSFER_READ) && !(usage & PIPE_TRANSFER_MAP_DIRECTLY) &&
 	    (rtex->resource.domains == RADEON_DOMAIN_VRAM)) {
+		/* Untiled buffers in VRAM, which is slow for CPU reads */
 		use_staging_texture = TRUE;
-	}
-
-	/* Use a staging texture for uploads if the underlying BO is busy. */
-	if (!(usage & PIPE_TRANSFER_READ) &&
+	} else if (!(usage & PIPE_TRANSFER_READ) &&
 	    (r600_rings_is_buffer_referenced(rctx, rtex->resource.cs_buf, RADEON_USAGE_READWRITE) ||
 	     rctx->ws->buffer_is_busy(rtex->resource.buf, RADEON_USAGE_READWRITE))) {
+		/* Use a staging texture for uploads if the underlying BO is busy. */
 		use_staging_texture = TRUE;
 	}