Mesa (master): i965: Skip recalculating URB allocations if the entry size didn't change.
Kenneth Graunke
kwg at kemper.freedesktop.org
Sat Oct 25 06:23:37 UTC 2014
Module: Mesa
Branch: master
Commit: 08599f668c5d991ab19376a19cb2e14e5245db95
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=08599f668c5d991ab19376a19cb2e14e5245db95
Author: Eric Anholt <eric at anholt.net>
Date: Tue May 6 16:37:05 2014 -0700
i965: Skip recalculating URB allocations if the entry size didn't change.
We only get here if the VS/GS compiled programs change, but we can even
skip it if the VS/GS size didn't change.
Affects cairo runtime on glamor by -1.26471% +/- 0.674335% (n=234)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 5 +++--
src/mesa/drivers/dri/i965/gen6_urb.c | 4 ++--
src/mesa/drivers/dri/i965/gen7_urb.c | 13 +++++++++++++
4 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 8b3f45b..e1a994a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -814,7 +814,7 @@ brwCreateContext(gl_api api,
brw->max_gtt_map_object_size = gtt_size / 4;
if (brw->gen == 6)
- brw->urb.gen6_gs_previously_active = false;
+ brw->urb.gs_present = false;
brw->prim_restart.in_progress = false;
brw->prim_restart.enable_cut_index = false;
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 45d72d2..eb37e75 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1169,6 +1169,7 @@ struct brw_context
*/
struct {
GLuint vsize; /* vertex size plus header in urb registers */
+ GLuint gsize; /* GS output size in urb registers */
GLuint csize; /* constant buffer size in urb registers */
GLuint sfsize; /* setup data size in urb registers */
@@ -1191,10 +1192,10 @@ struct brw_context
GLuint cs_start;
GLuint size; /* Hardware URB size, in KB. */
- /* gen6: True if the most recently sent _3DSTATE_URB message allocated
+ /* True if the most recently sent _3DSTATE_URB message allocated
* URB space for the GS.
*/
- bool gen6_gs_previously_active;
+ bool gs_present;
} urb;
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c
index 7af1f37..46cc4cc2 100644
--- a/src/mesa/drivers/dri/i965/gen6_urb.c
+++ b/src/mesa/drivers/dri/i965/gen6_urb.c
@@ -119,9 +119,9 @@ gen6_upload_urb( struct brw_context *brw )
* doesn't exist on Gen6). So for now we just do a full pipeline flush as
* a workaround.
*/
- if (brw->urb.gen6_gs_previously_active && !gs_present)
+ if (brw->urb.gs_present && !gs_present)
intel_batchbuffer_emit_mi_flush(brw);
- brw->urb.gen6_gs_previously_active = gs_present;
+ brw->urb.gs_present = gs_present;
}
const struct brw_tracked_state gen6_urb = {
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 190d6f0..eb3784a 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -150,6 +150,19 @@ gen7_upload_urb(struct brw_context *brw)
unsigned gs_size = gs_present ? brw->gs.prog_data->base.urb_entry_size : 1;
unsigned gs_entry_size_bytes = gs_size * 64;
+ /* If we're just switching between programs with the same URB requirements,
+ * skip the rest of the logic.
+ */
+ if (!(brw->state.dirty.brw & BRW_NEW_CONTEXT) &&
+ brw->urb.vsize == vs_size &&
+ brw->urb.gs_present == gs_present &&
+ brw->urb.gsize == gs_size) {
+ return;
+ }
+ brw->urb.vsize = vs_size;
+ brw->urb.gs_present = gs_present;
+ brw->urb.gsize = gs_size;
+
/* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS):
*
* VS Number of URB Entries must be divisible by 8 if the VS URB Entry
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