Mesa (master): i965/gen9: use an unreserved surface alignment value
Nanley Chery
nchery at kemper.freedesktop.org
Wed Jul 1 17:22:32 UTC 2015
Module: Mesa
Branch: master
Commit: 2c8f251369072ce382f651ba73ca280517d26e7f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c8f251369072ce382f651ba73ca280517d26e7f
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Wed Jun 24 10:59:13 2015 -0700
i965/gen9: use an unreserved surface alignment value
Although the horizontal and vertical alignment fields are ignored here,
0 is a reserved value for them and may cause undefined behavior. Change
the default value to an abitrary valid one.
v2: add comment about chosen value (Topi).
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index b2d1a57..bd3eb00 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -88,12 +88,12 @@ vertical_alignment(const struct brw_context *brw,
uint32_t surf_type)
{
/* On Gen9+ vertical alignment is ignored for 1D surfaces and when
- * tr_mode is not TRMODE_NONE.
+ * tr_mode is not TRMODE_NONE. Set to an arbitrary non-reserved value.
*/
if (brw->gen > 8 &&
(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE ||
surf_type == BRW_SURFACE_1D))
- return 0;
+ return GEN8_SURFACE_VALIGN_4;
switch (mt->align_h) {
case 4:
@@ -113,12 +113,12 @@ horizontal_alignment(const struct brw_context *brw,
uint32_t surf_type)
{
/* On Gen9+ horizontal alignment is ignored when tr_mode is not
- * TRMODE_NONE.
+ * TRMODE_NONE. Set to an arbitrary non-reserved value.
*/
if (brw->gen > 8 &&
(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE ||
gen9_use_linear_1d_layout(brw, mt)))
- return 0;
+ return GEN8_SURFACE_HALIGN_4;
switch (mt->align_w) {
case 4:
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