Mesa (master): 26 new commits
Rob Clark
robclark at kemper.freedesktop.org
Sun Jun 21 18:41:20 UTC 2015
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=66a93a0ff9aa402c37aa9d00b4489715d611b496
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Jun 13 09:14:31 2015 -0400
freedreno/ir3: pass sz to split_dest()
For query_levels, we generate a getinfo with writemask of (z), which RA
will consider as size==3. But we were still generating four fanouts.
Which meant that RA would see it as two different register classes,
depending on the path to definer. Ie. on the getinfo instruction itself
it would see size==3, but when chasing back through the fanouts it would
see size==4.
Easiest way to solve that is to just generate the chain of neighboring
fanouts to have the correct size in the first place.
Note: we may eventually want split_dest() to take start/end or wrmask
instead, since really we only need size==1. But RA is not clever enough
for that, query_levels is not that common, and the other two registers
that get allocated are never used so those register slots can be
immediately re-used. So bunch of work for probably no real gain.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ee4d51e7a68f8f2dcb52a0e2f9af81fdbe078a2
Author: Rob Clark <robclark at freedesktop.org>
Date: Fri Jun 12 14:27:44 2015 -0400
freedreno/ir3/nir: add more opcodes
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43048c7093c367897fbcbb3ca8580e9c122cd6f6
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jun 8 14:45:47 2015 -0400
freedreno/ir3: only unminify txf coords on a3xx
Seems like a4xx gets this right.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f008082b184072159e5aedc7fc103efba8740ed
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jun 8 14:23:49 2015 -0400
freedreno: remove int sampler shader variants
We get this information from NIR (which gets it from sview decl in tgsi
when translating from tgsi), so no need to maintain shader variants for
this.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=457f7c2a2a93b45396ac66e0d4b3896d2db8fdf3
Author: Rob Clark <robdclark at gmail.com>
Date: Tue Jun 9 17:17:06 2015 -0400
freedreno/ir3: block reshuffling and loops!
This shuffles things around to allow the shader to have multiple basic
blocks. We drop the entire CFG structure from nir and just preserve the
blocks. At scheduling we know whether to schedule conditional branches
or unconditional jumps at the end of the block based on the # of block
successors. (Dropping jumps to the following instruction, etc.)
One slight complication is that variables (load_var/store_var, ie.
arrays) are not in SSA form, so we have to figure out where to put the
phi's ourself. For this, we use the predecessor set information from
nir_block. (We could perhaps use NIR's dominance frontier information
to help with this?)
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=660d5c1646f5d63f9626b24beabc9cfc318849d4
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jun 1 12:35:19 2015 -0400
freedreno/ir3: a4xx encodes larger immed offset
Without this, negative branch/jump offsets look like very large positive
offsets.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d646d3ae9d221104db0e9daec33ef470b1bdd957
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon May 25 10:59:21 2015 -0400
freedreno/ir3: simplify find_neighbors stop condition
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8fb5f8a011e1db78af3ceaf91c5cb3b1acaee14
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon May 25 10:30:54 2015 -0400
freedreno/ir3: move inputs/outputs to shader
These belong in the shader, rather than the block. Mostly a lot of
churn and nothing too interesting. But splitting this out from the
rest of ir3_block reshuffling to cut down the noise in the later
patch.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d52fb2f5ad828f879286b9068023b82b9897bc17
Author: Rob Clark <robclark at freedesktop.org>
Date: Fri May 1 12:21:12 2015 -0400
freedreno/ir3/ra: use register_allocate
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=694beb8b830c993e9bfb744655be3dbd558ab3a8
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat May 23 13:37:41 2015 -0400
freedreno/ir3: introduce ir3_compiler object
Right now, just provides a cleaner way to get at the gpu-id, given the
separation between compiler and context. But we will need this also to
hold the reg-set for new register allocation.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c1e153467a50dec91df49239654017e9ed86d69
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Apr 25 16:30:55 2015 -0400
freedreno/ir3: dump nocp option
No longer used, or even possible, with NIR frontend.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7674ab12e826d2ea33f13fb2e6ca8ae2a62fe460
Author: Rob Clark <robdclark at gmail.com>
Date: Tue Jun 9 17:42:16 2015 -0400
freedreno/ir3: silence warnings
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f6faa8ff317634ffb75e6040f2de2019dd80d13
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Apr 25 10:22:49 2015 -0400
freedreno/ir3: remove tgsi f/e
Also remove ir3_flatten which was only used by tgsi f/e.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7273cb4e933f8be65fc73b9d8c69c76d1078cb14
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Apr 30 13:57:15 2015 -0400
freedreno/ir3/sched: convert to priority queue
Use a more standard priority-queue based scheduling algo. It is simpler
and will make things easier once we have multiple basic blocks and flow
control.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=adf1659ff5f07d907eca552be3b566e408c8601e
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Apr 30 11:38:43 2015 -0400
freedreno/ir3: use standard list implementation
Use standard list_head double-linked list and related iterators,
helpers, etc, rather than weird combo of instruction array and next
pointers depending on stage. Now block has an instrs_list. In
certain stages where we want to remove and re-add to the blocks list
we just use list_replace() to copy the list to a new list_head.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=67d994c6761e09205dbc9a0515c510fc9dde02c7
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Apr 30 10:10:14 2015 -0400
freedreno/ir3: drop dot graph dumping
At least for now.. right now the instruction and instruction list
printing should suffice, and the re-working of ir3_block would require
a lot of changes in that code.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c8c2e2f97394436effbdd3e0f61eec4590accb2
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Apr 25 11:05:27 2015 -0400
freedreno/ir3: more builder helpers
Use ir3_MOV() builder in a couple of spots, rather than open-coding the
instruction construction. Also add ir3_NOP() builder and use that
instead of open coding.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b33015f8895a37fcae1da2984796cb1ef30f8b13
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Apr 30 15:20:03 2015 -0400
gallium/ttn: add missing SNE
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c79b2e626c60a29f684bc389f07a712b59fa99cc
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Apr 29 08:38:45 2015 -0400
util/list: add list_first/last_entry
I need an easier way to get at head/tail in ir3.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3d2e367167b675c0b402c90220f40f8cd567d7c
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jun 8 14:09:09 2015 -0400
gallium/ttn: add texture-type support
v2: rebased on using SVIEW to hold type information
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb258c1dec1ff348d508a6b02fbc9aa11eb9f829
Author: Rob Clark <robclark at freedesktop.org>
Date: Mon Jun 8 13:20:30 2015 -0400
glsl_to_tgsi: add SVIEW decl support
Freedreno needs sampler type information to deal with int/uint textures.
To accomplish this, start creating sampler-view declarations, as
suggested here:
http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html
create a sampler-view with index matching the sampler, to encode the
texture type (ie. SINT/UINT/FLOAT). Ie:
DCL SVIEW[n], 2D, UINT
DCL SAMP[n]
TEX OUT[1], IN[1], SAMP[n]
For tgsi texture instructions which do not take an explicit SVIEW
argument, the SVIEW index is implied by the SAMP index.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=93379748f7e4f5ab22040cdb7a4cccdcfb7954c1
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jun 10 20:02:55 2015 -0400
util/blitter (and friends): generate appropriate SVIEW decls
Some hardware needs to know the sampler type. Update the blit related
shaders to include SVIEW decl.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e53699298640df7d7659a8ce88b68e43918b600c
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jun 10 20:01:11 2015 -0400
util/pstipple: updates for SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b516e68afb548894eff6b1f375c01f6dfafb6aed
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jun 10 19:59:20 2015 -0400
draw: updates to support SVIEW decls
To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f481af110e6ab42b2d184f225bfe7eb1e66df393
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jun 10 19:51:32 2015 -0400
tgsi/transform: add support for SVIEW decls
TODO single return_type (use enum)
v2: single return_type arg, and use enum
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b13135e06671468d296a33abf4150060f2b2a061
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Jun 10 19:49:55 2015 -0400
tgsi: update docs for SVIEW usage with TEX* instructions
Based on mailing list discussion here:
http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
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