Mesa (master): i965/gen9: Don't use encrypted MOCS

[Ben Widawsky]

Module: Mesa
Branch: master
Commit: 20dca37a20f90762df13efd0e0ec97002b6a89f2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=20dca37a20f90762df13efd0e0ec97002b6a89f2

Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Wed Jun 17 15:50:13 2015 -0700

i965/gen9: Don't use encrypted MOCS

On gen9+ MOCS is an index into a table. It is 7 bits, and AFAICT, bit 0 is for
doing encrypted reads.

I don't recall how I decided to do this for BXT. I don't know this patch was
ever needed, since it seems nothing is broken today on SKL. Furthermore, this
patch may no longer be needed because of the ongoing changes with MOCS setup. It
is what is being used/tested, so it's included in the series.

The chosen values are the old values left shifted. That was also an arbitrary
choice.

v2: Use shift in MOCS to make it clear what we're doing. (Ken)

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_defines.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index bfcc442..66b9abc 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2495,8 +2495,8 @@ enum brw_wm_barycentric_interp_mode {
  * cache settings.  We still use only either write-back or write-through; and
  * rely on the documented default values.
  */
-#define SKL_MOCS_WB 9
-#define SKL_MOCS_WT 5
+#define SKL_MOCS_WB (0b001001 << 1)
+#define SKL_MOCS_WT (0b000101 << 1)
 
 #define MEDIA_VFE_STATE                         0x7000
 /* GEN7 DW2, GEN8+ DW3 */