Mesa (master): winsys/radeon: align BO size to page size

[Grigori Goronzy]

Module: Mesa
Branch: master
Commit: 29aaab2b5f55cc6d9a84f58ce2bb8607e76a9dde
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=29aaab2b5f55cc6d9a84f58ce2bb8607e76a9dde

Author: Grigori Goronzy <greg at chown.ath.cx>
Date:   Wed Jun 24 03:38:02 2015 +0200

winsys/radeon: align BO size to page size

This is the basic granularity for BO allocations. The alignment also
helps with BO reuse by the cached bufmgr.

This results in a huge 45% speedup in Metro 2033 Redux on my test
system. The game relies on buffer orphaning with very small buffers
(hundreds of bytes in size) and that did not work efficiently
before. This change may also affect other applications and games.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/winsys/radeon/drm/radeon_drm_bo.c |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 78c95b1..1f0caf6 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -840,6 +840,12 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
     memset(&desc, 0, sizeof(desc));
     desc.base.alignment = alignment;
 
+    /* Align size to page size. This is the minimum alignment for normal
+     * BOs. Aligning this here helps the cached bufmgr. Especially small BOs,
+     * like constant/uniform buffers, can benefit from better and more reuse.
+     */
+    size = align(size, 4096);
+
     /* Only set one usage bit each for domains and flags, or the cache manager
      * might consider different sets of domains / flags compatible
      */